Michael W. Oneill

Array ( [id] => 4100569 [patent_doc_number] => 06055653 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Method and apparatus for testing gang memory modules' [patent_app_type] => 1 [patent_app_number] => 9/067177 [patent_app_country] => US [patent_app_date] => 1998-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6504 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/055/06055653.pdf [firstpage_image] =>[orig_patent_app_number] => 067177 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4177990 [patent_doc_number] => 06105161 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Error data correction circuit' [patent_app_type] => 1 [patent_app_number] => 9/026555 [patent_app_country] => US [patent_app_date] => 1998-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 18 [patent_no_of_words] => 2963 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/105/06105161.pdf [firstpage_image] =>[orig_patent_app_number] => 026555 [rel_patent_id] =>[rel_patent_doc_number] =>)