Search

Michele C. Flood

Examiner (ID: 18881)

Most Active Art Unit
1655
Art Unit(s)
1641, 1655, 1654, 1651
Total Applications
822
Issued Applications
375
Pending Applications
76
Abandoned Applications
371

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8262393 [patent_doc_number] => 20120161827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'CENTRAL LC PLL WITH INJECTION LOCKED RING PLL OR DELL PER LANE' [patent_app_type] => utility [patent_app_number] => 13/338111 [patent_app_country] => US [patent_app_date] => 2011-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1552 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13338111 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/338111
CENTRAL LC PLL WITH INJECTION LOCKED RING PLL OR DELL PER LANE Dec 26, 2011 Abandoned
Array ( [id] => 10167013 [patent_doc_number] => 09198256 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-24 [patent_title] => 'Method and apparatus to limit current overshoot and undershoot in light driver' [patent_app_type] => utility [patent_app_number] => 13/996050 [patent_app_country] => US [patent_app_date] => 2011-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 6737 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13996050 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/996050
Method and apparatus to limit current overshoot and undershoot in light driver Dec 19, 2011 Issued
Array ( [id] => 9145791 [patent_doc_number] => 20130300314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-14 [patent_title] => 'Setting up hybrid coded-light - ZigBee lighting system' [patent_app_type] => utility [patent_app_number] => 13/997421 [patent_app_country] => US [patent_app_date] => 2011-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4694 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13997421 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/997421
Setting up hybrid coded-light—ZigBee lighting system Dec 18, 2011 Issued
Array ( [id] => 8050511 [patent_doc_number] => 20120074991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'RESET SIGNAL DISTRIBUTION' [patent_app_type] => utility [patent_app_number] => 13/310382 [patent_app_country] => US [patent_app_date] => 2011-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3627 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20120074991.pdf [firstpage_image] =>[orig_patent_app_number] => 13310382 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/310382
Reset signal distribution Dec 1, 2011 Issued
Array ( [id] => 7816579 [patent_doc_number] => 20120063199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/300825 [patent_app_country] => US [patent_app_date] => 2011-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3628 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20120063199.pdf [firstpage_image] =>[orig_patent_app_number] => 13300825 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/300825
SEMICONDUCTOR DEVICE Nov 20, 2011 Abandoned
Array ( [id] => 11912971 [patent_doc_number] => 09781808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-03 [patent_title] => 'Method of controlling an illumination device having a number of light source arrays' [patent_app_type] => utility [patent_app_number] => 13/990574 [patent_app_country] => US [patent_app_date] => 2011-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11245 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13990574 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/990574
Method of controlling an illumination device having a number of light source arrays Nov 20, 2011 Issued
Array ( [id] => 8206143 [patent_doc_number] => 20120126864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'POWER-ON RESET' [patent_app_type] => utility [patent_app_number] => 13/299728 [patent_app_country] => US [patent_app_date] => 2011-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3381 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20120126864.pdf [firstpage_image] =>[orig_patent_app_number] => 13299728 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/299728
POWER-ON RESET Nov 17, 2011 Abandoned
Array ( [id] => 8275512 [patent_doc_number] => 20120169386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-05 [patent_title] => 'RESETTING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/295270 [patent_app_country] => US [patent_app_date] => 2011-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6997 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13295270 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/295270
Resetting circuit Nov 13, 2011 Issued
Array ( [id] => 8615753 [patent_doc_number] => 20130021065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-24 [patent_title] => 'POWER-UP SIGNAL GENERATING CIRCUIT OF SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/291641 [patent_app_country] => US [patent_app_date] => 2011-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5406 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13291641 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/291641
Power-up signal generating circuit of semiconductor integrated circuit Nov 7, 2011 Issued
Array ( [id] => 9010269 [patent_doc_number] => 08525573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-03 [patent_title] => 'Quadrature radio frequency mixer with low noise and low conversion loss' [patent_app_type] => utility [patent_app_number] => 13/289249 [patent_app_country] => US [patent_app_date] => 2011-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 6382 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13289249 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/289249
Quadrature radio frequency mixer with low noise and low conversion loss Nov 3, 2011 Issued
Array ( [id] => 8181044 [patent_doc_number] => 20120112816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'CIRCUIT AND METHOD FOR IMPLEMENTING POWER GOOD AND CHIP ENABLE CONTROL BY A MULTI-FUNCTIONAL PIN OF AN INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/287828 [patent_app_country] => US [patent_app_date] => 2011-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2687 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20120112816.pdf [firstpage_image] =>[orig_patent_app_number] => 13287828 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/287828
Circuit and method for implementing power good and chip enable control by a multi-functional pin of an integrated circuit Nov 1, 2011 Issued
Array ( [id] => 8956805 [patent_doc_number] => 08502586 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-06 [patent_title] => 'Methods of clock signal generation with selected phase delay' [patent_app_type] => utility [patent_app_number] => 13/287109 [patent_app_country] => US [patent_app_date] => 2011-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 9205 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13287109 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/287109
Methods of clock signal generation with selected phase delay Oct 31, 2011 Issued
Array ( [id] => 8657534 [patent_doc_number] => 20130038363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-14 [patent_title] => 'DELAY LOCKED LOOP' [patent_app_type] => utility [patent_app_number] => 13/285088 [patent_app_country] => US [patent_app_date] => 2011-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4635 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13285088 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/285088
Delay locked loop Oct 30, 2011 Issued
Array ( [id] => 8750159 [patent_doc_number] => 08415993 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-04-09 [patent_title] => 'Power-on reset circuit and method' [patent_app_type] => utility [patent_app_number] => 13/281921 [patent_app_country] => US [patent_app_date] => 2011-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9376 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13281921 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/281921
Power-on reset circuit and method Oct 25, 2011 Issued
Array ( [id] => 8134985 [patent_doc_number] => 20120092042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'SEMICONDUCTOR DEVICE AND SAMPLE-AND-HOLD CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/274836 [patent_app_country] => US [patent_app_date] => 2011-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5063 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0092/20120092042.pdf [firstpage_image] =>[orig_patent_app_number] => 13274836 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/274836
SEMICONDUCTOR DEVICE AND SAMPLE-AND-HOLD CIRCUIT Oct 16, 2011 Abandoned
Array ( [id] => 9274199 [patent_doc_number] => 08638135 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-28 [patent_title] => 'Integrated circuit having latch-up recovery circuit' [patent_app_type] => utility [patent_app_number] => 13/272542 [patent_app_country] => US [patent_app_date] => 2011-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3218 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13272542 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/272542
Integrated circuit having latch-up recovery circuit Oct 12, 2011 Issued
Array ( [id] => 9141186 [patent_doc_number] => 08581655 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-12 [patent_title] => 'Clock signal supplying method and circuit for shift registers' [patent_app_type] => utility [patent_app_number] => 13/270382 [patent_app_country] => US [patent_app_date] => 2011-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3834 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13270382 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/270382
Clock signal supplying method and circuit for shift registers Oct 10, 2011 Issued
Array ( [id] => 8295141 [patent_doc_number] => 08222931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-17 [patent_title] => 'Semiconductor device and driving method thereof' [patent_app_type] => utility [patent_app_number] => 13/269511 [patent_app_country] => US [patent_app_date] => 2011-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8213 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13269511 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/269511
Semiconductor device and driving method thereof Oct 6, 2011 Issued
Array ( [id] => 8123865 [patent_doc_number] => 20120086477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-12 [patent_title] => 'GATE SIGNAL LINE DRIVE CIRCUIT AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/253202 [patent_app_country] => US [patent_app_date] => 2011-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 16119 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20120086477.pdf [firstpage_image] =>[orig_patent_app_number] => 13253202 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/253202
Gate signal line drive circuit and display device Oct 4, 2011 Issued
Array ( [id] => 8743032 [patent_doc_number] => 20130082749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'RESET GENERATOR' [patent_app_type] => utility [patent_app_number] => 13/252919 [patent_app_country] => US [patent_app_date] => 2011-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2772 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13252919 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/252919
Reset generator Oct 3, 2011 Issued
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