Search

Michele C. Flood

Examiner (ID: 18881)

Most Active Art Unit
1655
Art Unit(s)
1641, 1655, 1654, 1651
Total Applications
822
Issued Applications
375
Pending Applications
76
Abandoned Applications
371

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7551351 [patent_doc_number] => 08063686 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-11-22 [patent_title] => 'Phase interpolator circuit with two phase capacitor charging' [patent_app_type] => utility [patent_app_number] => 12/270038 [patent_app_country] => US [patent_app_date] => 2008-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 9329 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/063/08063686.pdf [firstpage_image] =>[orig_patent_app_number] => 12270038 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/270038
Phase interpolator circuit with two phase capacitor charging Nov 12, 2008 Issued
Array ( [id] => 7685756 [patent_doc_number] => 20100120385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-13 [patent_title] => 'RADIO FREQUENCY AMPLIFICATION CIRCUIT UTILIZING VARIABLE VOLTAGE GENERATOR' [patent_app_type] => utility [patent_app_number] => 12/267239 [patent_app_country] => US [patent_app_date] => 2008-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2606 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20100120385.pdf [firstpage_image] =>[orig_patent_app_number] => 12267239 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/267239
Radio frequency amplification circuit utilizing variable voltage generator Nov 6, 2008 Issued
Array ( [id] => 8551363 [patent_doc_number] => 08326255 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-04 [patent_title] => 'Biasing arrangement, electronic apparatus, biasing method, and computer program' [patent_app_type] => utility [patent_app_number] => 12/266988 [patent_app_country] => US [patent_app_date] => 2008-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 7661 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12266988 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/266988
Biasing arrangement, electronic apparatus, biasing method, and computer program Nov 6, 2008 Issued
Array ( [id] => 8319084 [patent_doc_number] => 08233875 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-31 [patent_title] => 'Device beacon for handoff management of handoffs to access nodes' [patent_app_type] => utility [patent_app_number] => 12/267261 [patent_app_country] => US [patent_app_date] => 2008-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 26 [patent_no_of_words] => 14792 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12267261 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/267261
Device beacon for handoff management of handoffs to access nodes Nov 6, 2008 Issued
Array ( [id] => 6306260 [patent_doc_number] => 20100109783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'Reconfigurable Amplifier and Filter Using Time-Varying Circuits' [patent_app_type] => utility [patent_app_number] => 12/263626 [patent_app_country] => US [patent_app_date] => 2008-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5288 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20100109783.pdf [firstpage_image] =>[orig_patent_app_number] => 12263626 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/263626
Reconfigurable Amplifier and Filter Using Time-Varying Circuits Nov 2, 2008 Abandoned
Array ( [id] => 8364385 [patent_doc_number] => 08253454 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-28 [patent_title] => 'Phase lock loop with phase interpolation by reference clock and method for the same' [patent_app_type] => utility [patent_app_number] => 12/263456 [patent_app_country] => US [patent_app_date] => 2008-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3792 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12263456 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/263456
Phase lock loop with phase interpolation by reference clock and method for the same Oct 31, 2008 Issued
Array ( [id] => 54498 [patent_doc_number] => 07772907 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-10 [patent_title] => 'Linear digital phase interpolator and semi-digital delay locked loop (DLL)' [patent_app_type] => utility [patent_app_number] => 12/255170 [patent_app_country] => US [patent_app_date] => 2008-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4725 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/772/07772907.pdf [firstpage_image] =>[orig_patent_app_number] => 12255170 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/255170
Linear digital phase interpolator and semi-digital delay locked loop (DLL) Oct 20, 2008 Issued
Array ( [id] => 8329379 [patent_doc_number] => 08237475 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-08-07 [patent_title] => 'Techniques for generating PVT compensated phase offset to improve accuracy of a locked loop' [patent_app_type] => utility [patent_app_number] => 12/248031 [patent_app_country] => US [patent_app_date] => 2008-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9256 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12248031 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/248031
Techniques for generating PVT compensated phase offset to improve accuracy of a locked loop Oct 7, 2008 Issued
Array ( [id] => 6344140 [patent_doc_number] => 20100085099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-08 [patent_title] => 'MULTI-PHASE SIGNAL GENERATOR AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/245444 [patent_app_country] => US [patent_app_date] => 2008-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5119 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20100085099.pdf [firstpage_image] =>[orig_patent_app_number] => 12245444 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/245444
Multi-phase signal generator and method Oct 2, 2008 Issued
Array ( [id] => 6344116 [patent_doc_number] => 20100085094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-08 [patent_title] => 'MULTI-PHASE SIGNAL GENERATOR AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/245407 [patent_app_country] => US [patent_app_date] => 2008-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5489 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20100085094.pdf [firstpage_image] =>[orig_patent_app_number] => 12245407 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/245407
Multi-phase signal generator and method Oct 2, 2008 Issued
Array ( [id] => 4580528 [patent_doc_number] => 07825713 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-02 [patent_title] => 'Absolute time delay generating device' [patent_app_type] => utility [patent_app_number] => 12/286765 [patent_app_country] => US [patent_app_date] => 2008-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3683 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/825/07825713.pdf [firstpage_image] =>[orig_patent_app_number] => 12286765 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/286765
Absolute time delay generating device Oct 1, 2008 Issued
Array ( [id] => 8245441 [patent_doc_number] => 08203367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-19 [patent_title] => 'Frequency divider and method for frequency division' [patent_app_type] => utility [patent_app_number] => 12/738405 [patent_app_country] => US [patent_app_date] => 2008-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 5828 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/203/08203367.pdf [firstpage_image] =>[orig_patent_app_number] => 12738405 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/738405
Frequency divider and method for frequency division Sep 30, 2008 Issued
Array ( [id] => 5567811 [patent_doc_number] => 20090251189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-08 [patent_title] => 'Multi-Phase Phase Interpolator' [patent_app_type] => utility [patent_app_number] => 12/207777 [patent_app_country] => US [patent_app_date] => 2008-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5046 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0251/20090251189.pdf [firstpage_image] =>[orig_patent_app_number] => 12207777 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/207777
Multi-phase phase interpolator Sep 9, 2008 Issued
Array ( [id] => 5499852 [patent_doc_number] => 20090160540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'POWER-UP CIRCUIT FOR REDUCING A VARIATION IN TRIGGERING VOLTAGE IN A SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/206975 [patent_app_country] => US [patent_app_date] => 2008-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3453 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20090160540.pdf [firstpage_image] =>[orig_patent_app_number] => 12206975 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/206975
POWER-UP CIRCUIT FOR REDUCING A VARIATION IN TRIGGERING VOLTAGE IN A SEMICONDUCTOR INTEGRATED CIRCUIT Sep 8, 2008 Abandoned
Array ( [id] => 7505455 [patent_doc_number] => 08035426 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-10-11 [patent_title] => 'Power-on-reset generator using a voltage-shaping inverter chain' [patent_app_type] => utility [patent_app_number] => 12/206485 [patent_app_country] => US [patent_app_date] => 2008-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5188 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/035/08035426.pdf [firstpage_image] =>[orig_patent_app_number] => 12206485 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/206485
Power-on-reset generator using a voltage-shaping inverter chain Sep 7, 2008 Issued
Array ( [id] => 5420263 [patent_doc_number] => 20090146718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-11 [patent_title] => 'DELAY CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/203923 [patent_app_country] => US [patent_app_date] => 2008-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5823 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20090146718.pdf [firstpage_image] =>[orig_patent_app_number] => 12203923 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/203923
DELAY CIRCUIT Sep 3, 2008 Abandoned
Array ( [id] => 8773262 [patent_doc_number] => 08427225 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-23 [patent_title] => 'Gate driving circuit' [patent_app_type] => utility [patent_app_number] => 12/681515 [patent_app_country] => US [patent_app_date] => 2008-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7215 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12681515 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/681515
Gate driving circuit Sep 2, 2008 Issued
Array ( [id] => 8447011 [patent_doc_number] => 08289068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-16 [patent_title] => 'Method for switching without any interruption between winding taps on a tap-changing transformer' [patent_app_type] => utility [patent_app_number] => 12/989427 [patent_app_country] => US [patent_app_date] => 2008-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3669 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12989427 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/989427
Method for switching without any interruption between winding taps on a tap-changing transformer Aug 26, 2008 Issued
Array ( [id] => 5450350 [patent_doc_number] => 20090066386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-12 [patent_title] => 'MTCMOS FLIP-FLOP WITH RETENTION FUNCTION' [patent_app_type] => utility [patent_app_number] => 12/195075 [patent_app_country] => US [patent_app_date] => 2008-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4435 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20090066386.pdf [firstpage_image] =>[orig_patent_app_number] => 12195075 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/195075
MTCMOS FLIP-FLOP WITH RETENTION FUNCTION Aug 19, 2008 Abandoned
Array ( [id] => 143531 [patent_doc_number] => 07692481 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-06 [patent_title] => 'Band-gap reference voltage generator for low-voltage operation and high precision' [patent_app_type] => utility [patent_app_number] => 12/195260 [patent_app_country] => US [patent_app_date] => 2008-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5157 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 417 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/692/07692481.pdf [firstpage_image] =>[orig_patent_app_number] => 12195260 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/195260
Band-gap reference voltage generator for low-voltage operation and high precision Aug 19, 2008 Issued
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