Search

Michele C. Flood

Examiner (ID: 18881)

Most Active Art Unit
1655
Art Unit(s)
1641, 1655, 1654, 1651
Total Applications
822
Issued Applications
375
Pending Applications
76
Abandoned Applications
371

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5320496 [patent_doc_number] => 20090058486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'MASTER-SLAVE CIRCUIT AND CONTROL METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 12/193261 [patent_app_country] => US [patent_app_date] => 2008-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11294 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20090058486.pdf [firstpage_image] =>[orig_patent_app_number] => 12193261 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/193261
MASTER-SLAVE CIRCUIT AND CONTROL METHOD OF THE SAME Aug 17, 2008 Abandoned
Array ( [id] => 8859343 [patent_doc_number] => 08461884 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-11 [patent_title] => 'Programmable delay circuit providing for a wide span of delays' [patent_app_type] => utility [patent_app_number] => 12/189823 [patent_app_country] => US [patent_app_date] => 2008-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2881 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12189823 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/189823
Programmable delay circuit providing for a wide span of delays Aug 11, 2008 Issued
Array ( [id] => 5414049 [patent_doc_number] => 20090039936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'Flip-flop circuit, pipeline circuit including a flip-flop circuit, and method of operating a flip-flop circuit' [patent_app_type] => utility [patent_app_number] => 12/222481 [patent_app_country] => US [patent_app_date] => 2008-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8804 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20090039936.pdf [firstpage_image] =>[orig_patent_app_number] => 12222481 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/222481
Flip-flop circuit, pipeline circuit including a flip-flop circuit, and method of operating a flip-flop circuit Aug 10, 2008 Issued
Array ( [id] => 4947462 [patent_doc_number] => 20080303588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-11 [patent_title] => 'REFERENCE VOLTAGE GENERATING CIRCUIT AND CONSTANT VOLTAGE CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/187899 [patent_app_country] => US [patent_app_date] => 2008-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 8568 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0303/20080303588.pdf [firstpage_image] =>[orig_patent_app_number] => 12187899 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/187899
Reference voltage generating circuit and constant voltage circuit Aug 6, 2008 Issued
Array ( [id] => 5414061 [patent_doc_number] => 20090039948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'CHARGE PUMP CIRCUIT AND CHARGE PUMPING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/187292 [patent_app_country] => US [patent_app_date] => 2008-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2874 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20090039948.pdf [firstpage_image] =>[orig_patent_app_number] => 12187292 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/187292
CHARGE PUMP CIRCUIT AND CHARGE PUMPING METHOD THEREOF Aug 5, 2008 Abandoned
Array ( [id] => 4572822 [patent_doc_number] => 07847624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-07 [patent_title] => 'Internal power supply circuit' [patent_app_type] => utility [patent_app_number] => 12/186240 [patent_app_country] => US [patent_app_date] => 2008-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 8885 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/847/07847624.pdf [firstpage_image] =>[orig_patent_app_number] => 12186240 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/186240
Internal power supply circuit Aug 4, 2008 Issued
Array ( [id] => 6248241 [patent_doc_number] => 20100026365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'ROBUST CURRENT MIRROR WITH IMPROVED INPUT VOLTAGE HEADROOM' [patent_app_type] => utility [patent_app_number] => 12/182174 [patent_app_country] => US [patent_app_date] => 2008-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2278 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20100026365.pdf [firstpage_image] =>[orig_patent_app_number] => 12182174 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/182174
Robust current mirror with improved input voltage headroom Jul 29, 2008 Issued
Array ( [id] => 4777193 [patent_doc_number] => 20080285191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'BACKFLOW PREVENTING CIRCUIT CAPABLE OF PREVENTING REVERSE CURRENT EFFICIENTLY' [patent_app_type] => utility [patent_app_number] => 12/177451 [patent_app_country] => US [patent_app_date] => 2008-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3719 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20080285191.pdf [firstpage_image] =>[orig_patent_app_number] => 12177451 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/177451
Backflow preventing circuit capable of preventing reverse current efficiently Jul 21, 2008 Issued
Array ( [id] => 75699 [patent_doc_number] => 07750701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-06 [patent_title] => 'Phase-locked loop circuits and methods implementing multiplexer circuit for fine tuning control of digitally controlled oscillators' [patent_app_type] => utility [patent_app_number] => 12/173159 [patent_app_country] => US [patent_app_date] => 2008-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3571 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/750/07750701.pdf [firstpage_image] =>[orig_patent_app_number] => 12173159 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/173159
Phase-locked loop circuits and methods implementing multiplexer circuit for fine tuning control of digitally controlled oscillators Jul 14, 2008 Issued
Array ( [id] => 54482 [patent_doc_number] => 07772900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-10 [patent_title] => 'Phase-locked loop circuits and methods implementing pulsewidth modulation for fine tuning control of digitally controlled oscillators' [patent_app_type] => utility [patent_app_number] => 12/173140 [patent_app_country] => US [patent_app_date] => 2008-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5462 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/772/07772900.pdf [firstpage_image] =>[orig_patent_app_number] => 12173140 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/173140
Phase-locked loop circuits and methods implementing pulsewidth modulation for fine tuning control of digitally controlled oscillators Jul 14, 2008 Issued
Array ( [id] => 5358582 [patent_doc_number] => 20090033376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-05 [patent_title] => 'Locked loop circuit' [patent_app_type] => utility [patent_app_number] => 12/219075 [patent_app_country] => US [patent_app_date] => 2008-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2498 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20090033376.pdf [firstpage_image] =>[orig_patent_app_number] => 12219075 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/219075
Locked loop circuit Jul 14, 2008 Issued
Array ( [id] => 6467749 [patent_doc_number] => 20100007396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-14 [patent_title] => 'COMPOUND LOGIC FLIP-FLOP HAVING A PLURALITY OF INPUT STAGES' [patent_app_type] => utility [patent_app_number] => 12/171838 [patent_app_country] => US [patent_app_date] => 2008-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4536 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20100007396.pdf [firstpage_image] =>[orig_patent_app_number] => 12171838 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/171838
Compound logic flip-flop having a plurality of input stages Jul 10, 2008 Issued
Array ( [id] => 4857133 [patent_doc_number] => 20080265983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'METHODS TO REDUCE THRESHOLD VOLTAGE TOLERANCE AND SKEW IN MULTI-THRESHOLD VOLTAGE APPLICATIONS' [patent_app_type] => utility [patent_app_number] => 12/169705 [patent_app_country] => US [patent_app_date] => 2008-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7030 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20080265983.pdf [firstpage_image] =>[orig_patent_app_number] => 12169705 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/169705
Methods to reduce threshold voltage tolerance and skew in multi-threshold voltage applications Jul 8, 2008 Issued
Array ( [id] => 8007343 [patent_doc_number] => 08085076 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-27 [patent_title] => 'Data retention flip flop for low power applications' [patent_app_type] => utility [patent_app_number] => 12/217390 [patent_app_country] => US [patent_app_date] => 2008-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4244 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/085/08085076.pdf [firstpage_image] =>[orig_patent_app_number] => 12217390 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/217390
Data retention flip flop for low power applications Jul 2, 2008 Issued
Array ( [id] => 4680307 [patent_doc_number] => 20080246533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-09 [patent_title] => 'METHODS AND CIRCUITS TO REDUCE THRESHOLD VOLTAGE TOLERANCE AND SKEW IN MULTI-THRESHOLD VOLTAGE APPLICATIONS' [patent_app_type] => utility [patent_app_number] => 12/138514 [patent_app_country] => US [patent_app_date] => 2008-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20080246533.pdf [firstpage_image] =>[orig_patent_app_number] => 12138514 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/138514
METHODS AND CIRCUITS TO REDUCE THRESHOLD VOLTAGE TOLERANCE AND SKEW IN MULTI-THRESHOLD VOLTAGE APPLICATIONS Jun 12, 2008 Abandoned
Array ( [id] => 5499802 [patent_doc_number] => 20090160490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'REFERENCE VOLTAGE GENERATOR OF ANALOG-TO-DIGITAL CONVERTER' [patent_app_type] => utility [patent_app_number] => 12/137672 [patent_app_country] => US [patent_app_date] => 2008-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3349 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20090160490.pdf [firstpage_image] =>[orig_patent_app_number] => 12137672 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/137672
REFERENCE VOLTAGE GENERATOR OF ANALOG-TO-DIGITAL CONVERTER Jun 11, 2008 Abandoned
Array ( [id] => 5346703 [patent_doc_number] => 20090002064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'CHARGE PUMP CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/137815 [patent_app_country] => US [patent_app_date] => 2008-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3215 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20090002064.pdf [firstpage_image] =>[orig_patent_app_number] => 12137815 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/137815
Charge pump circuit with control circuitry Jun 11, 2008 Issued
Array ( [id] => 5365345 [patent_doc_number] => 20090302904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'Phase Frequency Detector Circuit for Implementing Low PLL Phase Noise and Low Phase Error' [patent_app_type] => utility [patent_app_number] => 12/136218 [patent_app_country] => US [patent_app_date] => 2008-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3634 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20090302904.pdf [firstpage_image] =>[orig_patent_app_number] => 12136218 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/136218
Phase Frequency Detector Circuit for Implementing Low PLL Phase Noise and Low Phase Error Jun 9, 2008 Abandoned
Array ( [id] => 4572798 [patent_doc_number] => 07847620 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-07 [patent_title] => 'Charge pumping circuit with decreased current consumption' [patent_app_type] => utility [patent_app_number] => 12/136429 [patent_app_country] => US [patent_app_date] => 2008-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2013 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/847/07847620.pdf [firstpage_image] =>[orig_patent_app_number] => 12136429 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/136429
Charge pumping circuit with decreased current consumption Jun 9, 2008 Issued
Array ( [id] => 5365371 [patent_doc_number] => 20090302930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'Charge Pump with Vt Cancellation Through Parallel Structure' [patent_app_type] => utility [patent_app_number] => 12/135945 [patent_app_country] => US [patent_app_date] => 2008-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3033 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20090302930.pdf [firstpage_image] =>[orig_patent_app_number] => 12135945 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/135945
Charge Pump with Vt Cancellation Through Parallel Structure Jun 8, 2008 Abandoned
Menu