Michele C. Flood

Array ( [id] => 4708706 [patent_doc_number] => 20080297232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'CHARGE PUMP CIRCUIT AND SLICE LEVEL CONTROL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/132996 [patent_app_country] => US [patent_app_date] => 2008-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3144 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0297/20080297232.pdf [firstpage_image] =>[orig_patent_app_number] => 12132996 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6115748 [patent_doc_number] => 20110074476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'APPARATUS FOR LOCK-IN AMPLIFYING AN INPUT SIGNAL AND METHOD FOR GENERATING A REFERENCE SIGNAL FOR A LOCK-IN AMPLIFIER' [patent_app_type] => utility [patent_app_number] => 12/993884 [patent_app_country] => US [patent_app_date] => 2008-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4340 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20110074476.pdf [firstpage_image] =>[orig_patent_app_number] => 12993884 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4789951 [patent_doc_number] => 20080290924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'METHOD AND APPARATUS FOR PROGRAMMABLE DELAY HAVING FINE DELAY RESOLUTION' [patent_app_type] => utility [patent_app_number] => 12/116516 [patent_app_country] => US [patent_app_date] => 2008-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5130 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20080290924.pdf [firstpage_image] =>[orig_patent_app_number] => 12116516 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4708693 [patent_doc_number] => 20080297219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'EQUAL DELAY FLIP-FLOP BASED ON LOCALIZED FEEDBACK PATHS' [patent_app_type] => utility [patent_app_number] => 12/107789 [patent_app_country] => US [patent_app_date] => 2008-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4483 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0297/20080297219.pdf [firstpage_image] =>[orig_patent_app_number] => 12107789 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6306180 [patent_doc_number] => 20100109755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/595596 [patent_app_country] => US [patent_app_date] => 2008-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4499 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20100109755.pdf [firstpage_image] =>[orig_patent_app_number] => 12595596 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6241543 [patent_doc_number] => 20100134154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-03 [patent_title] => 'ODD NUMBER FREQUENCY DIVIDING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/450629 [patent_app_country] => US [patent_app_date] => 2008-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3941 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20100134154.pdf [firstpage_image] =>[orig_patent_app_number] => 12450629 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4605192 [patent_doc_number] => 07986175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-26 [patent_title] => 'Spread spectrum control PLL circuit and its start-up method' [patent_app_type] => utility [patent_app_number] => 12/595008 [patent_app_country] => US [patent_app_date] => 2008-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 8055 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/986/07986175.pdf [firstpage_image] =>[orig_patent_app_number] => 12595008 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6306161 [patent_doc_number] => 20100109746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'SAMPLING MIXER, FILTER DEVICE, AND RADIO DEVICE' [patent_app_type] => utility [patent_app_number] => 12/532530 [patent_app_country] => US [patent_app_date] => 2008-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6232 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20100109746.pdf [firstpage_image] =>[orig_patent_app_number] => 12532530 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4715976 [patent_doc_number] => 20080238498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'CLOCK GENERATOR, METHOD FOR GENERATING CLOCK SIGNAL AND FRACTIONAL PHASE LOCK LOOP THEREOF' [patent_app_type] => utility [patent_app_number] => 12/046527 [patent_app_country] => US [patent_app_date] => 2008-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3222 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20080238498.pdf [firstpage_image] =>[orig_patent_app_number] => 12046527 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5573421 [patent_doc_number] => 20090140782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-04 [patent_title] => 'SPREAD SPECTRUM CLOCK GENERATING APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/045712 [patent_app_country] => US [patent_app_date] => 2008-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6864 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20090140782.pdf [firstpage_image] =>[orig_patent_app_number] => 12045712 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 93590 [patent_doc_number] => 07737743 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-06-15 [patent_title] => 'Phase-locked loop including sampling phase detector and charge pump with pulse width control' [patent_app_type] => utility [patent_app_number] => 12/044522 [patent_app_country] => US [patent_app_date] => 2008-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2724 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/737/07737743.pdf [firstpage_image] =>[orig_patent_app_number] => 12044522 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5499806 [patent_doc_number] => 20090160494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'OUTPUT DRIVING CIRCUITS' [patent_app_type] => utility [patent_app_number] => 12/043699 [patent_app_country] => US [patent_app_date] => 2008-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2466 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20090160494.pdf [firstpage_image] =>[orig_patent_app_number] => 12043699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 260575 [patent_doc_number] => 07573305 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-08-11 [patent_title] => 'High speed divider circuit' [patent_app_type] => utility [patent_app_number] => 12/041085 [patent_app_country] => US [patent_app_date] => 2008-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 1764 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/573/07573305.pdf [firstpage_image] =>[orig_patent_app_number] => 12041085 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 83282 [patent_doc_number] => 07746164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-29 [patent_title] => 'Voltage generating circuit' [patent_app_type] => utility [patent_app_number] => 12/027699 [patent_app_country] => US [patent_app_date] => 2008-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 7122 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/746/07746164.pdf [firstpage_image] =>[orig_patent_app_number] => 12027699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5525196 [patent_doc_number] => 20090195273 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'START-UP CIRCUIT FOR SMIA INPUT CLOCK BUFFER' [patent_app_type] => utility [patent_app_number] => 12/026641 [patent_app_country] => US [patent_app_date] => 2008-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2480 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20090195273.pdf [firstpage_image] =>[orig_patent_app_number] => 12026641 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5525210 [patent_doc_number] => 20090195287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'APPARATUS AND METHOD FOR EXTERNAL TO INTERNAL CLOCK GENERATION' [patent_app_type] => utility [patent_app_number] => 12/027124 [patent_app_country] => US [patent_app_date] => 2008-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7468 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20090195287.pdf [firstpage_image] =>[orig_patent_app_number] => 12027124 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4446412 [patent_doc_number] => 07863952 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Method and circuit for controlling clock frequency of an electronic circuit with noise mitigation' [patent_app_type] => utility [patent_app_number] => 12/023933 [patent_app_country] => US [patent_app_date] => 2008-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2338 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/863/07863952.pdf [firstpage_image] =>[orig_patent_app_number] => 12023933 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4566465 [patent_doc_number] => 07839185 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-23 [patent_title] => 'Method and circuit arrangement configured for driving a field-effect-controlled transistor' [patent_app_type] => utility [patent_app_number] => 12/022587 [patent_app_country] => US [patent_app_date] => 2008-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3309 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/839/07839185.pdf [firstpage_image] =>[orig_patent_app_number] => 12022587 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 44066 [patent_doc_number] => 07782126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-24 [patent_title] => 'Detection and accommodation of hot-plug conditions' [patent_app_type] => utility [patent_app_number] => 12/021334 [patent_app_country] => US [patent_app_date] => 2008-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6381 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/782/07782126.pdf [firstpage_image] =>[orig_patent_app_number] => 12021334 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5377836 [patent_doc_number] => 20090189675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-30 [patent_title] => 'HIGH PERFORMANCE PSEUDO DYNAMIC PULSE CONTROLLABLE MULTIPLEXER' [patent_app_type] => utility [patent_app_number] => 12/021454 [patent_app_country] => US [patent_app_date] => 2008-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2381 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20090189675.pdf [firstpage_image] =>[orig_patent_app_number] => 12021454 [rel_patent_id] =>[rel_patent_doc_number] =>)