Michele C. Flood

Array ( [id] => 229408 [patent_doc_number] => 07602223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-13 [patent_title] => 'Delay-locked loop circuit and method of generating multiplied clock therefrom' [patent_app_type] => utility [patent_app_number] => 11/877187 [patent_app_country] => US [patent_app_date] => 2007-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5372 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 390 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/602/07602223.pdf [firstpage_image] =>[orig_patent_app_number] => 11877187 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4913514 [patent_doc_number] => 20080094113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'Fraction-N Frequency Divider and Method Thereof' [patent_app_type] => utility [patent_app_number] => 11/876760 [patent_app_country] => US [patent_app_date] => 2007-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4093 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20080094113.pdf [firstpage_image] =>[orig_patent_app_number] => 11876760 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4913513 [patent_doc_number] => 20080094112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT CONTROLLING OUTPUT IMPEDANCE AND SLEW RATE' [patent_app_type] => utility [patent_app_number] => 11/876231 [patent_app_country] => US [patent_app_date] => 2007-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5944 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20080094112.pdf [firstpage_image] =>[orig_patent_app_number] => 11876231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4913519 [patent_doc_number] => 20080094118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'OUTPUT INTERFACING DEVICE COMPENSATED IN LOAD AND CORRESPONDING ELECTRONIC CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/875234 [patent_app_country] => US [patent_app_date] => 2007-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3743 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20080094118.pdf [firstpage_image] =>[orig_patent_app_number] => 11875234 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4925568 [patent_doc_number] => 20080164931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-10 [patent_title] => 'LEVEL SHIFTER CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/873424 [patent_app_country] => US [patent_app_date] => 2007-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3657 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20080164931.pdf [firstpage_image] =>[orig_patent_app_number] => 11873424 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 84952 [patent_doc_number] => 07741890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-22 [patent_title] => 'Method and apparatus for generating multi-phase signals' [patent_app_type] => utility [patent_app_number] => 11/873752 [patent_app_country] => US [patent_app_date] => 2007-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4124 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/741/07741890.pdf [firstpage_image] =>[orig_patent_app_number] => 11873752 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5269116 [patent_doc_number] => 20090072891 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-19 [patent_title] => 'Varactor-based charge pump' [patent_app_type] => utility [patent_app_number] => 11/901019 [patent_app_country] => US [patent_app_date] => 2007-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4651 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20090072891.pdf [firstpage_image] =>[orig_patent_app_number] => 11901019 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 334840 [patent_doc_number] => 07508253 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-03-24 [patent_title] => 'Charge pump device and operating method thereof' [patent_app_type] => utility [patent_app_number] => 11/898384 [patent_app_country] => US [patent_app_date] => 2007-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9230 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 351 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/508/07508253.pdf [firstpage_image] =>[orig_patent_app_number] => 11898384 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4691469 [patent_doc_number] => 20080084239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-10 [patent_title] => 'Regulated charge pump circuit' [patent_app_type] => utility [patent_app_number] => 11/898134 [patent_app_country] => US [patent_app_date] => 2007-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3969 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20080084239.pdf [firstpage_image] =>[orig_patent_app_number] => 11898134 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5320490 [patent_doc_number] => 20090058480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'SCHEME FOR CONTROLLING RISE-FALL TIMES IN SIGNAL TRANSITIONS' [patent_app_type] => utility [patent_app_number] => 11/848241 [patent_app_country] => US [patent_app_date] => 2007-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3893 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20090058480.pdf [firstpage_image] =>[orig_patent_app_number] => 11848241 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 93534 [patent_doc_number] => 07737730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-15 [patent_title] => 'Method of detecting the frequency of an input clock signal of an integrated circuit and integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/848431 [patent_app_country] => US [patent_app_date] => 2007-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4884 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/737/07737730.pdf [firstpage_image] =>[orig_patent_app_number] => 11848431 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 304123 [patent_doc_number] => 07535264 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-19 [patent_title] => 'Methods and systems for comparing currents using current conveyor circuitry' [patent_app_type] => utility [patent_app_number] => 11/847973 [patent_app_country] => US [patent_app_date] => 2007-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7809 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/535/07535264.pdf [firstpage_image] =>[orig_patent_app_number] => 11847973 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4769360 [patent_doc_number] => 20080055018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-06 [patent_title] => 'SEMICONDUCTOR DEVICE WITH DECOUPLING CAPACITANCE CONTROLLED AND CONTROL METHOD FOR THE SAME' [patent_app_type] => utility [patent_app_number] => 11/847768 [patent_app_country] => US [patent_app_date] => 2007-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 8985 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20080055018.pdf [firstpage_image] =>[orig_patent_app_number] => 11847768 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4913512 [patent_doc_number] => 20080094111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'Drive Circuit for Insulated Gate Device' [patent_app_type] => utility [patent_app_number] => 11/847885 [patent_app_country] => US [patent_app_date] => 2007-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4144 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20080094111.pdf [firstpage_image] =>[orig_patent_app_number] => 11847885 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4769319 [patent_doc_number] => 20080054977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-06 [patent_title] => 'ELECTRONIC CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/847871 [patent_app_country] => US [patent_app_date] => 2007-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5786 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20080054977.pdf [firstpage_image] =>[orig_patent_app_number] => 11847871 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 331064 [patent_doc_number] => 07511563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-31 [patent_title] => 'Ripple current reduction circuit' [patent_app_type] => utility [patent_app_number] => 11/895462 [patent_app_country] => US [patent_app_date] => 2007-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2546 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/511/07511563.pdf [firstpage_image] =>[orig_patent_app_number] => 11895462 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4902175 [patent_doc_number] => 20080111588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-15 [patent_title] => 'Input buffer circuit' [patent_app_type] => utility [patent_app_number] => 11/822815 [patent_app_country] => US [patent_app_date] => 2007-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2528 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20080111588.pdf [firstpage_image] =>[orig_patent_app_number] => 11822815 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4902187 [patent_doc_number] => 20080111600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-15 [patent_title] => 'Apparatus and method of setting operation mode in DLL circuit' [patent_app_type] => utility [patent_app_number] => 11/822357 [patent_app_country] => US [patent_app_date] => 2007-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7585 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20080111600.pdf [firstpage_image] =>[orig_patent_app_number] => 11822357 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4649280 [patent_doc_number] => 20080036535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'Amplifying circuit of semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/819610 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4732 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20080036535.pdf [firstpage_image] =>[orig_patent_app_number] => 11819610 [rel_patent_id] =>[rel_patent_doc_number] =>)