Search

Michele C. Flood

Examiner (ID: 18881)

Most Active Art Unit
1655
Art Unit(s)
1641, 1655, 1654, 1651
Total Applications
822
Issued Applications
375
Pending Applications
76
Abandoned Applications
371

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5129416 [patent_doc_number] => 20070205813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-06 [patent_title] => 'Circuit and method for reducing jitter and/or phase jump problems in a clock amplifier device' [patent_app_type] => utility [patent_app_number] => 11/706076 [patent_app_country] => US [patent_app_date] => 2007-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1785 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20070205813.pdf [firstpage_image] =>[orig_patent_app_number] => 11706076 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/706076
Circuit and method for reducing jitter and/or phase jump problems in a clock amplifier device Feb 12, 2007 Abandoned
Array ( [id] => 592703 [patent_doc_number] => 07439780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-21 [patent_title] => 'Chopper type comparator' [patent_app_type] => utility [patent_app_number] => 11/702095 [patent_app_country] => US [patent_app_date] => 2007-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3184 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/439/07439780.pdf [firstpage_image] =>[orig_patent_app_number] => 11702095 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/702095
Chopper type comparator Feb 4, 2007 Issued
Array ( [id] => 4930866 [patent_doc_number] => 20080001641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-03 [patent_title] => 'Phase control circuit' [patent_app_type] => utility [patent_app_number] => 11/701398 [patent_app_country] => US [patent_app_date] => 2007-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3914 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20080001641.pdf [firstpage_image] =>[orig_patent_app_number] => 11701398 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/701398
Phase control circuit Feb 1, 2007 Abandoned
Array ( [id] => 143111 [patent_doc_number] => 07688125 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-30 [patent_title] => 'Latched comparator and methods for using such' [patent_app_type] => utility [patent_app_number] => 11/626860 [patent_app_country] => US [patent_app_date] => 2007-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4610 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/688/07688125.pdf [firstpage_image] =>[orig_patent_app_number] => 11626860 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/626860
Latched comparator and methods for using such Jan 24, 2007 Issued
Array ( [id] => 4645140 [patent_doc_number] => 08022749 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-20 [patent_title] => 'Circuit arrangement for voltage supply and method' [patent_app_type] => utility [patent_app_number] => 12/223107 [patent_app_country] => US [patent_app_date] => 2007-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6901 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/022/08022749.pdf [firstpage_image] =>[orig_patent_app_number] => 12223107 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/223107
Circuit arrangement for voltage supply and method Jan 17, 2007 Issued
Array ( [id] => 5186487 [patent_doc_number] => 20070164795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-19 [patent_title] => 'INTEGRATED CIRCUIT INPUT STAGE' [patent_app_type] => utility [patent_app_number] => 11/624135 [patent_app_country] => US [patent_app_date] => 2007-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4452 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20070164795.pdf [firstpage_image] =>[orig_patent_app_number] => 11624135 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/624135
Integrated circuit input stage Jan 16, 2007 Issued
Array ( [id] => 5426339 [patent_doc_number] => 20090085649 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-02 [patent_title] => 'Negative Output Regulator Circuit and Electrical Apparatus Using Same' [patent_app_type] => utility [patent_app_number] => 12/097323 [patent_app_country] => US [patent_app_date] => 2007-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5084 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20090085649.pdf [firstpage_image] =>[orig_patent_app_number] => 12097323 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/097323
Negative output regulator circuit and electrical apparatus using same Jan 4, 2007 Issued
Array ( [id] => 4750149 [patent_doc_number] => 20080158220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'Power-on-reset circuit and method therefor' [patent_app_type] => utility [patent_app_number] => 11/648548 [patent_app_country] => US [patent_app_date] => 2007-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1909 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20080158220.pdf [firstpage_image] =>[orig_patent_app_number] => 11648548 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/648548
Power-on-reset circuit and method therefor Jan 2, 2007 Abandoned
Array ( [id] => 5060848 [patent_doc_number] => 20070222487 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'Circuit for generating initialization signal' [patent_app_type] => utility [patent_app_number] => 11/648280 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5741 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20070222487.pdf [firstpage_image] =>[orig_patent_app_number] => 11648280 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/648280
Circuit for generating initialization signal Dec 28, 2006 Abandoned
Array ( [id] => 5157918 [patent_doc_number] => 20070170962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Low-power power-on reset circuit' [patent_app_type] => utility [patent_app_number] => 11/643819 [patent_app_country] => US [patent_app_date] => 2006-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2409 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20070170962.pdf [firstpage_image] =>[orig_patent_app_number] => 11643819 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/643819
Low-power power-on reset circuit Dec 21, 2006 Abandoned
Array ( [id] => 4877231 [patent_doc_number] => 20080150614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'Method and system for dynamic supply voltage biasing of integrated circuit blocks' [patent_app_type] => utility [patent_app_number] => 11/642335 [patent_app_country] => US [patent_app_date] => 2006-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3636 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20080150614.pdf [firstpage_image] =>[orig_patent_app_number] => 11642335 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/642335
Method and system for dynamic supply voltage biasing of integrated circuit blocks Dec 19, 2006 Abandoned
Array ( [id] => 323185 [patent_doc_number] => 07518419 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-04-14 [patent_title] => 'Wideband power-on reset circuit' [patent_app_type] => utility [patent_app_number] => 11/639497 [patent_app_country] => US [patent_app_date] => 2006-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 6950 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/518/07518419.pdf [firstpage_image] =>[orig_patent_app_number] => 11639497 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/639497
Wideband power-on reset circuit Dec 14, 2006 Issued
Array ( [id] => 338532 [patent_doc_number] => 07504877 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-03-17 [patent_title] => 'Charge pump and voltage regulator for body bias voltage' [patent_app_type] => utility [patent_app_number] => 11/639546 [patent_app_country] => US [patent_app_date] => 2006-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 9691 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 405 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/504/07504877.pdf [firstpage_image] =>[orig_patent_app_number] => 11639546 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/639546
Charge pump and voltage regulator for body bias voltage Dec 14, 2006 Issued
Array ( [id] => 4864390 [patent_doc_number] => 20080143449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-19 [patent_title] => 'Temperature-sensitive current source' [patent_app_type] => utility [patent_app_number] => 11/638186 [patent_app_country] => US [patent_app_date] => 2006-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2534 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0143/20080143449.pdf [firstpage_image] =>[orig_patent_app_number] => 11638186 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/638186
Temperature-sensitive current source Dec 12, 2006 Issued
Array ( [id] => 353181 [patent_doc_number] => 07492207 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-17 [patent_title] => 'Transistor switch' [patent_app_type] => utility [patent_app_number] => 11/636351 [patent_app_country] => US [patent_app_date] => 2006-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5761 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/492/07492207.pdf [firstpage_image] =>[orig_patent_app_number] => 11636351 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/636351
Transistor switch Dec 7, 2006 Issued
Array ( [id] => 5118122 [patent_doc_number] => 20070139836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-21 [patent_title] => 'Backflow preventing circuit capable of preventing reverse current efficiently' [patent_app_type] => utility [patent_app_number] => 11/636308 [patent_app_country] => US [patent_app_date] => 2006-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3719 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20070139836.pdf [firstpage_image] =>[orig_patent_app_number] => 11636308 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/636308
Backflow preventing circuit capable of preventing reverse current efficiently Dec 6, 2006 Issued
Array ( [id] => 4821463 [patent_doc_number] => 20080122492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-29 [patent_title] => 'FREQUENCY DETECTOR UTILIZING A PULSE GENERATOR, AND MEHTOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/562415 [patent_app_country] => US [patent_app_date] => 2006-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3748 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20080122492.pdf [firstpage_image] =>[orig_patent_app_number] => 11562415 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/562415
Frequency detector utilizing pulse generator, and method thereof Nov 21, 2006 Issued
Array ( [id] => 4667639 [patent_doc_number] => 20080042699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'LOW-POWER MODULUS DIVIDER STAGE' [patent_app_type] => utility [patent_app_number] => 11/560973 [patent_app_country] => US [patent_app_date] => 2006-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9247 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20080042699.pdf [firstpage_image] =>[orig_patent_app_number] => 11560973 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/560973
Low-power modulus divider stage Nov 16, 2006 Issued
Array ( [id] => 6355386 [patent_doc_number] => 20100073043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-25 [patent_title] => 'NETWORK AND METHOD FOR SETTING A TIME-BASE OF A NODE IN THE NETWORK' [patent_app_type] => utility [patent_app_number] => 12/513084 [patent_app_country] => US [patent_app_date] => 2006-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8536 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20100073043.pdf [firstpage_image] =>[orig_patent_app_number] => 12513084 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/513084
Network and method for setting a time-base of a node in the network Oct 30, 2006 Issued
Array ( [id] => 4691466 [patent_doc_number] => 20080084236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-10 [patent_title] => 'SERVO LOOP CIRCUIT FOR CONTINUOUS TIME DC OFFSET CANCELLATION' [patent_app_type] => utility [patent_app_number] => 11/538783 [patent_app_country] => US [patent_app_date] => 2006-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2571 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20080084236.pdf [firstpage_image] =>[orig_patent_app_number] => 11538783 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/538783
SERVO LOOP CIRCUIT FOR CONTINUOUS TIME DC OFFSET CANCELLATION Oct 3, 2006 Abandoned
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