Search

Michelle F. Paguio Frising

Examiner (ID: 18931, Phone: (571)272-6224 , Office: P/1651 )

Most Active Art Unit
1651
Art Unit(s)
1651
Total Applications
651
Issued Applications
402
Pending Applications
73
Abandoned Applications
201

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3773020 [patent_doc_number] => 05852745 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-22 [patent_title] => 'Graphical sheet technique for automatically changing the conditions of a printer/plotter' [patent_app_type] => 1 [patent_app_number] => 8/743338 [patent_app_country] => US [patent_app_date] => 1996-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3211 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/852/05852745.pdf [firstpage_image] =>[orig_patent_app_number] => 743338 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/743338
Graphical sheet technique for automatically changing the conditions of a printer/plotter Sep 30, 1996 Issued
Array ( [id] => 4256579 [patent_doc_number] => 06081849 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Method and structure for switching multiple contexts in storage subsystem target device' [patent_app_type] => 1 [patent_app_number] => 8/724385 [patent_app_country] => US [patent_app_date] => 1996-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 12432 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081849.pdf [firstpage_image] =>[orig_patent_app_number] => 724385 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/724385
Method and structure for switching multiple contexts in storage subsystem target device Sep 30, 1996 Issued
Array ( [id] => 3961010 [patent_doc_number] => 05974472 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'System for detachably connecting memory cards which provide memory specified by predetermined range of addresses registered in list and updating list independent of the I/O operation' [patent_app_type] => 1 [patent_app_number] => 8/715548 [patent_app_country] => US [patent_app_date] => 1996-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 5008 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/974/05974472.pdf [firstpage_image] =>[orig_patent_app_number] => 715548 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/715548
System for detachably connecting memory cards which provide memory specified by predetermined range of addresses registered in list and updating list independent of the I/O operation Sep 18, 1996 Issued
Array ( [id] => 3910928 [patent_doc_number] => 05835788 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'System for transferring input/output data independently through an input/output bus interface in response to programmable instructions stored in a program memory' [patent_app_type] => 1 [patent_app_number] => 8/716555 [patent_app_country] => US [patent_app_date] => 1996-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 7584 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/835/05835788.pdf [firstpage_image] =>[orig_patent_app_number] => 716555 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/716555
System for transferring input/output data independently through an input/output bus interface in response to programmable instructions stored in a program memory Sep 17, 1996 Issued
Array ( [id] => 3759538 [patent_doc_number] => 05754882 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Method for scheduling I/O transactions for a data storage system to maintain continuity of a plurality of full motion video streams' [patent_app_type] => 1 [patent_app_number] => 8/711031 [patent_app_country] => US [patent_app_date] => 1996-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 9606 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 305 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754882.pdf [firstpage_image] =>[orig_patent_app_number] => 711031 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/711031
Method for scheduling I/O transactions for a data storage system to maintain continuity of a plurality of full motion video streams Sep 9, 1996 Issued
Array ( [id] => 3785546 [patent_doc_number] => 05734925 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-31 [patent_title] => 'Method for scheduling I/O transactions in a data storage system to maintain the continuity of a plurality of video streams' [patent_app_type] => 1 [patent_app_number] => 8/711050 [patent_app_country] => US [patent_app_date] => 1996-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 9600 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 356 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/734/05734925.pdf [firstpage_image] =>[orig_patent_app_number] => 711050 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/711050
Method for scheduling I/O transactions in a data storage system to maintain the continuity of a plurality of video streams Sep 9, 1996 Issued
Array ( [id] => 3768494 [patent_doc_number] => 05721950 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-24 [patent_title] => 'Method for scheduling I/O transactions for video data storage unit to maintain continuity of number of video streams which is limited by number of I/O transactions' [patent_app_type] => 1 [patent_app_number] => 8/711049 [patent_app_country] => US [patent_app_date] => 1996-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 9602 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/721/05721950.pdf [firstpage_image] =>[orig_patent_app_number] => 711049 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/711049
Method for scheduling I/O transactions for video data storage unit to maintain continuity of number of video streams which is limited by number of I/O transactions Sep 9, 1996 Issued
Array ( [id] => 4208513 [patent_doc_number] => 06154794 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Upstream situated apparatus and method within a computer system for controlling data flow to a downstream situated input/output unit' [patent_app_type] => 1 [patent_app_number] => 8/716951 [patent_app_country] => US [patent_app_date] => 1996-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6659 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/154/06154794.pdf [firstpage_image] =>[orig_patent_app_number] => 716951 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/716951
Upstream situated apparatus and method within a computer system for controlling data flow to a downstream situated input/output unit Sep 7, 1996 Issued
Array ( [id] => 4081004 [patent_doc_number] => 05867651 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-02 [patent_title] => 'System for providing custom functionality to client systems by redirecting of messages through a user configurable filter network having a plurality of partially interconnected filters' [patent_app_type] => 1 [patent_app_number] => 8/703557 [patent_app_country] => US [patent_app_date] => 1996-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3486 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/867/05867651.pdf [firstpage_image] =>[orig_patent_app_number] => 703557 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/703557
System for providing custom functionality to client systems by redirecting of messages through a user configurable filter network having a plurality of partially interconnected filters Aug 26, 1996 Issued
Array ( [id] => 3929243 [patent_doc_number] => 06002883 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-14 [patent_title] => 'System with intersystem information links for intersystem traffic having I/O traffic being transmitted to and from processor bus via processor means' [patent_app_type] => 1 [patent_app_number] => 8/696547 [patent_app_country] => US [patent_app_date] => 1996-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5088 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/002/06002883.pdf [firstpage_image] =>[orig_patent_app_number] => 696547 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/696547
System with intersystem information links for intersystem traffic having I/O traffic being transmitted to and from processor bus via processor means Aug 13, 1996 Issued
Array ( [id] => 4015197 [patent_doc_number] => 05923899 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'System for generating configuration output signal responsive to configuration input signal, enabling configuration, and providing status signal identifying enabled configuration responsive to the output signal' [patent_app_type] => 1 [patent_app_number] => 8/696246 [patent_app_country] => US [patent_app_date] => 1996-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 6379 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923899.pdf [firstpage_image] =>[orig_patent_app_number] => 696246 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/696246
System for generating configuration output signal responsive to configuration input signal, enabling configuration, and providing status signal identifying enabled configuration responsive to the output signal Aug 12, 1996 Issued
Array ( [id] => 4017704 [patent_doc_number] => 05859975 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Parallel processing computer system having shared coherent memory and interconnections utilizing separate undirectional request and response lines for direct communication or using crossbar switching device' [patent_app_type] => 1 [patent_app_number] => 8/695266 [patent_app_country] => US [patent_app_date] => 1996-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4664 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/859/05859975.pdf [firstpage_image] =>[orig_patent_app_number] => 695266 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/695266
Parallel processing computer system having shared coherent memory and interconnections utilizing separate undirectional request and response lines for direct communication or using crossbar switching device Aug 8, 1996 Issued
Array ( [id] => 4178260 [patent_doc_number] => 06115739 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Image scanner adapted for direct connection to client/server type network' [patent_app_type] => 1 [patent_app_number] => 8/685638 [patent_app_country] => US [patent_app_date] => 1996-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5372 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 33 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/115/06115739.pdf [firstpage_image] =>[orig_patent_app_number] => 685638 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/685638
Image scanner adapted for direct connection to client/server type network Jul 23, 1996 Issued
Array ( [id] => 3966275 [patent_doc_number] => 05983260 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Serial control and data interconnects for coupling an I/O module with a switch fabric in a switch' [patent_app_type] => 1 [patent_app_number] => 8/683792 [patent_app_country] => US [patent_app_date] => 1996-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3529 [patent_no_of_claims] => 80 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/983/05983260.pdf [firstpage_image] =>[orig_patent_app_number] => 683792 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/683792
Serial control and data interconnects for coupling an I/O module with a switch fabric in a switch Jul 17, 1996 Issued
Array ( [id] => 3954998 [patent_doc_number] => 05930478 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'System for starting transmission assuming one file format, automatically detecting whether proper format used, and aborting and restarting transmission if original format incorrect' [patent_app_type] => 1 [patent_app_number] => 8/674478 [patent_app_country] => US [patent_app_date] => 1996-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3042 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/930/05930478.pdf [firstpage_image] =>[orig_patent_app_number] => 674478 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/674478
System for starting transmission assuming one file format, automatically detecting whether proper format used, and aborting and restarting transmission if original format incorrect Jul 1, 1996 Issued
Array ( [id] => 4042269 [patent_doc_number] => 05931922 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-03 [patent_title] => 'Media server system for preventing FIFO buffer underflow during multiple channel startup by waiting until buffer receives plurality of data blocks before enabling buffer to transmit received data' [patent_app_type] => 1 [patent_app_number] => 8/673583 [patent_app_country] => US [patent_app_date] => 1996-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4507 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/931/05931922.pdf [firstpage_image] =>[orig_patent_app_number] => 673583 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/673583
Media server system for preventing FIFO buffer underflow during multiple channel startup by waiting until buffer receives plurality of data blocks before enabling buffer to transmit received data Jun 30, 1996 Issued
Array ( [id] => 3955768 [patent_doc_number] => 05930526 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'System for progressive transmission of compressed video including video data of first type of video frame played independently of video data of second type of video frame' [patent_app_type] => 1 [patent_app_number] => 8/672559 [patent_app_country] => US [patent_app_date] => 1996-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7669 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/930/05930526.pdf [firstpage_image] =>[orig_patent_app_number] => 672559 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/672559
System for progressive transmission of compressed video including video data of first type of video frame played independently of video data of second type of video frame Jun 27, 1996 Issued
Array ( [id] => 3961024 [patent_doc_number] => 05974473 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'System for controlling insertion, locking, and removal of modules by removing plurality of device drivers for module to be removed from BIOS and informing BIOS of module removal' [patent_app_type] => 1 [patent_app_number] => 8/663499 [patent_app_country] => US [patent_app_date] => 1996-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 7058 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/974/05974473.pdf [firstpage_image] =>[orig_patent_app_number] => 663499 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/663499
System for controlling insertion, locking, and removal of modules by removing plurality of device drivers for module to be removed from BIOS and informing BIOS of module removal Jun 13, 1996 Issued
Array ( [id] => 3894754 [patent_doc_number] => 05764981 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'System for batch scheduling of travel-related transactions and batch tasks distribution by partitioning batch tasks among processing resources' [patent_app_type] => 1 [patent_app_number] => 8/664330 [patent_app_country] => US [patent_app_date] => 1996-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4524 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/764/05764981.pdf [firstpage_image] =>[orig_patent_app_number] => 664330 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/664330
System for batch scheduling of travel-related transactions and batch tasks distribution by partitioning batch tasks among processing resources Jun 13, 1996 Issued
Array ( [id] => 3878798 [patent_doc_number] => 05797035 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Networked multiprocessor system with global distributed memory and block transfer engine' [patent_app_type] => 1 [patent_app_number] => 8/661908 [patent_app_country] => US [patent_app_date] => 1996-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 11493 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/797/05797035.pdf [firstpage_image] =>[orig_patent_app_number] => 661908 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/661908
Networked multiprocessor system with global distributed memory and block transfer engine Jun 11, 1996 Issued
Menu