Michelle F. Paguio Frising

Array ( [id] => 3600850 [patent_doc_number] => 05553310 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-03 [patent_title] => 'Split transactions and pipelined arbitration of microprocessors in multiprocessing computer systems' [patent_app_type] => 1 [patent_app_number] => 7/955930 [patent_app_country] => US [patent_app_date] => 1992-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 28 [patent_no_of_words] => 28184 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/553/05553310.pdf [firstpage_image] =>[orig_patent_app_number] => 955930 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3521735 [patent_doc_number] => 05588134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-24 [patent_title] => 'System for establishing priority among selected tasks based on location of tasks and sequence that the tasks were stored whereas task is always stored in location with the lowest available address' [patent_app_type] => 1 [patent_app_number] => 7/951387 [patent_app_country] => US [patent_app_date] => 1992-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4818 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/588/05588134.pdf [firstpage_image] =>[orig_patent_app_number] => 951387 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3599939 [patent_doc_number] => 05497463 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-05 [patent_title] => 'Ally mechanism for interconnecting non-distributed computing environment (DCE) and DCE systems to operate in a network system' [patent_app_type] => 1 [patent_app_number] => 7/951069 [patent_app_country] => US [patent_app_date] => 1992-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 19549 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/497/05497463.pdf [firstpage_image] =>[orig_patent_app_number] => 951069 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3537979 [patent_doc_number] => 05504926 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-02 [patent_title] => 'Method for a host central processor and its associated controller to capture the selected one of a number of memory units via path control commands' [patent_app_type] => 1 [patent_app_number] => 7/949967 [patent_app_country] => US [patent_app_date] => 1992-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 2734 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/504/05504926.pdf [firstpage_image] =>[orig_patent_app_number] => 949967 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3533927 [patent_doc_number] => 05530943 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-25 [patent_title] => 'Method for producing an executable configuration of a system program loadable into a system memory area of a processor system' [patent_app_type] => 1 [patent_app_number] => 7/950653 [patent_app_country] => US [patent_app_date] => 1992-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2291 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/530/05530943.pdf [firstpage_image] =>[orig_patent_app_number] => 950653 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3121894 [patent_doc_number] => 05408612 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-18 [patent_title] => 'Microprocessor system for selectively accessing a processor internal register when the processor has control of the bus and partial address identifying the register' [patent_app_type] => 1 [patent_app_number] => 7/942246 [patent_app_country] => US [patent_app_date] => 1992-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4390 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/408/05408612.pdf [firstpage_image] =>[orig_patent_app_number] => 942246 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4048208 [patent_doc_number] => 05857112 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-05 [patent_title] => 'System for achieving enhanced performance and data availability in a unified redundant array of disk drives by using user defined partitioning and level of redundancy' [patent_app_type] => 1 [patent_app_number] => 7/943410 [patent_app_country] => US [patent_app_date] => 1992-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 6824 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/857/05857112.pdf [firstpage_image] =>[orig_patent_app_number] => 943410 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3596587 [patent_doc_number] => 05581783 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-03 [patent_title] => 'System for capturing multimedia information using a hand writing stylus pen which performs signal-to-data conversion inside the pen and stores data in the memory inside the pen' [patent_app_type] => 1 [patent_app_number] => 7/941539 [patent_app_country] => US [patent_app_date] => 1992-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5256 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/581/05581783.pdf [firstpage_image] =>[orig_patent_app_number] => 941539 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3604288 [patent_doc_number] => 05568613 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-22 [patent_title] => 'Dataframe bridge filter with communication node recordkeeping' [patent_app_type] => 1 [patent_app_number] => 7/939777 [patent_app_country] => US [patent_app_date] => 1992-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 7799 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/568/05568613.pdf [firstpage_image] =>[orig_patent_app_number] => 939777 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3627138 [patent_doc_number] => 05511226 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-23 [patent_title] => 'System for generating snoop addresses and conditionally generating source addresses whenever there is no snoop hit, the source addresses lagging behind the corresponding snoop addresses' [patent_app_type] => 1 [patent_app_number] => 7/935035 [patent_app_country] => US [patent_app_date] => 1992-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5114 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/511/05511226.pdf [firstpage_image] =>[orig_patent_app_number] => 935035 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3579359 [patent_doc_number] => 05485583 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-16 [patent_title] => 'System for controlling data transfer by setting and decrementing a counter based on the number of error correction bits and transfer bit rate respectively' [patent_app_type] => 1 [patent_app_number] => 7/933439 [patent_app_country] => US [patent_app_date] => 1992-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3177 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/485/05485583.pdf [firstpage_image] =>[orig_patent_app_number] => 933439 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3458040 [patent_doc_number] => 05420983 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-30 [patent_title] => 'Method for merging memory blocks, fetching associated disk chunk, merging memory blocks with the disk chunk, and writing the merged data' [patent_app_type] => 1 [patent_app_number] => 7/929085 [patent_app_country] => US [patent_app_date] => 1992-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4400 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/420/05420983.pdf [firstpage_image] =>[orig_patent_app_number] => 929085 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3132620 [patent_doc_number] => 05450550 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-12 [patent_title] => 'Parallel processing system for parallel prefetching of identical packet having two rendering commands and processing second command prior to completion of processing the first command' [patent_app_type] => 1 [patent_app_number] => 7/922675 [patent_app_country] => US [patent_app_date] => 1992-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 7185 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/450/05450550.pdf [firstpage_image] =>[orig_patent_app_number] => 922675 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3474126 [patent_doc_number] => 05469547 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-21 [patent_title] => 'Asynchronous bus interface for generating individual handshake signal for each data transfer based on associated propagation delay within a transaction' [patent_app_type] => 1 [patent_app_number] => 7/916327 [patent_app_country] => US [patent_app_date] => 1992-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7358 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/469/05469547.pdf [firstpage_image] =>[orig_patent_app_number] => 916327 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3600764 [patent_doc_number] => 05553305 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-03 [patent_title] => 'System for synchronizing execution by a processing element of threads within a process using a state indicator' [patent_app_type] => 1 [patent_app_number] => 7/914686 [patent_app_country] => US [patent_app_date] => 1992-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 10833 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/553/05553305.pdf [firstpage_image] =>[orig_patent_app_number] => 914686 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3488241 [patent_doc_number] => 05432911 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-11 [patent_title] => 'Controllers request access within one bus cycle causing hardware-wait to stall second controller when first controller is accessing and second controller is still requesting access' [patent_app_type] => 1 [patent_app_number] => 7/913690 [patent_app_country] => US [patent_app_date] => 1992-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 28 [patent_no_of_words] => 7253 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 349 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/432/05432911.pdf [firstpage_image] =>[orig_patent_app_number] => 913690 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3432196 [patent_doc_number] => 05479617 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-26 [patent_title] => 'System for combining and encoding first plurality of video signals to produce second plurality of signals and transmitting the signals via unshielded telephone cable to remote workstation' [patent_app_type] => 1 [patent_app_number] => 7/894418 [patent_app_country] => US [patent_app_date] => 1992-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 3933 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/479/05479617.pdf [firstpage_image] =>[orig_patent_app_number] => 894418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3420967 [patent_doc_number] => 05461718 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-24 [patent_title] => 'System for sequential read of memory stream buffer detecting page mode cycles availability fetching data into a selected FIFO, and sending data without aceessing memory' [patent_app_type] => 1 [patent_app_number] => 7/874076 [patent_app_country] => US [patent_app_date] => 1992-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 10726 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/461/05461718.pdf [firstpage_image] =>[orig_patent_app_number] => 874076 [rel_patent_id] =>[rel_patent_doc_number] =>)