Search

Michelle J. Lee

Examiner (ID: 2718, Phone: (571)270-7303 , Office: P/3772 )

Most Active Art Unit
3786
Art Unit(s)
3786, 3772, 3793
Total Applications
493
Issued Applications
202
Pending Applications
60
Abandoned Applications
251

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20145527 [patent_doc_number] => 12379869 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Adjustable function-in-memory computation system [patent_app_type] => utility [patent_app_number] => 18/744351 [patent_app_country] => US [patent_app_date] => 2024-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2492 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744351 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/744351
Adjustable function-in-memory computation system Jun 13, 2024 Issued
Array ( [id] => 19481810 [patent_doc_number] => 20240329852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => ADAPTIVE SCANNING OF MEMORY DEVICES WITH SUPERVISED LEARNING [patent_app_type] => utility [patent_app_number] => 18/739982 [patent_app_country] => US [patent_app_date] => 2024-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11688 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18739982 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/739982
Adaptive scanning of memory devices with supervised learning Jun 10, 2024 Issued
Array ( [id] => 19466209 [patent_doc_number] => 20240319879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => TUNED DATAPATH IN STACKED MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/736247 [patent_app_country] => US [patent_app_date] => 2024-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7091 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18736247 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/736247
TUNED DATAPATH IN STACKED MEMORY DEVICE Jun 5, 2024 Pending
Array ( [id] => 20395455 [patent_doc_number] => 20250370930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => METADATA-CACHING INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 18/732777 [patent_app_country] => US [patent_app_date] => 2024-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5602 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18732777 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/732777
METADATA-CACHING INTEGRATED CIRCUIT DEVICE Jun 3, 2024 Pending
Array ( [id] => 20395455 [patent_doc_number] => 20250370930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => METADATA-CACHING INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 18/732777 [patent_app_country] => US [patent_app_date] => 2024-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5602 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18732777 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/732777
METADATA-CACHING INTEGRATED CIRCUIT DEVICE Jun 3, 2024 Pending
Array ( [id] => 20242706 [patent_doc_number] => 12423024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Method and device for accessing memory [patent_app_type] => utility [patent_app_number] => 18/660095 [patent_app_country] => US [patent_app_date] => 2024-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 1243 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660095 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/660095
Method and device for accessing memory May 8, 2024 Issued
Array ( [id] => 20195310 [patent_doc_number] => 20250272020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-28 [patent_title] => MULTI-TYPE DISK DRIVE SUPPORT USING A COMMON SERVER STORAGE BACKPLANE [patent_app_type] => utility [patent_app_number] => 18/657553 [patent_app_country] => US [patent_app_date] => 2024-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3453 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18657553 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/657553
MULTI-TYPE DISK DRIVE SUPPORT USING A COMMON SERVER STORAGE BACKPLANE May 6, 2024 Pending
Array ( [id] => 19942436 [patent_doc_number] => 12314567 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-05-27 [patent_title] => Multi-chip module (MCM) with multi-port unified memory [patent_app_type] => utility [patent_app_number] => 18/653644 [patent_app_country] => US [patent_app_date] => 2024-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 0 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18653644 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/653644
Multi-chip module (MCM) with multi-port unified memory May 1, 2024 Issued
Array ( [id] => 19719301 [patent_doc_number] => 12204840 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-01-21 [patent_title] => Multi-chip module (MCM) with multi-port unified memory [patent_app_type] => utility [patent_app_number] => 18/653661 [patent_app_country] => US [patent_app_date] => 2024-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 5970 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18653661 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/653661
Multi-chip module (MCM) with multi-port unified memory May 1, 2024 Issued
Array ( [id] => 19588213 [patent_doc_number] => 20240385770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => WRITING TO RERAM [patent_app_type] => utility [patent_app_number] => 18/646479 [patent_app_country] => US [patent_app_date] => 2024-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5681 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18646479 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/646479
WRITING TO RERAM Apr 24, 2024 Pending
Array ( [id] => 19383194 [patent_doc_number] => 20240273064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => REDUCING STABLE DATA EVICTION WITH SYNTHETIC BASELINE SNAPSHOT AND EVICTION STATE REFRESH [patent_app_type] => utility [patent_app_number] => 18/641602 [patent_app_country] => US [patent_app_date] => 2024-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16727 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18641602 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/641602
REDUCING STABLE DATA EVICTION WITH SYNTHETIC BASELINE SNAPSHOT AND EVICTION STATE REFRESH Apr 21, 2024 Pending
Array ( [id] => 20160112 [patent_doc_number] => 12386740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Data storage device, operation method thereof, and storage system including the same [patent_app_type] => utility [patent_app_number] => 18/626328 [patent_app_country] => US [patent_app_date] => 2024-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 1055 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18626328 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/626328
Data storage device, operation method thereof, and storage system including the same Apr 3, 2024 Issued
Array ( [id] => 20281557 [patent_doc_number] => 20250306799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => LOW LATENCY SCRATCH MEMORY PATH [patent_app_type] => utility [patent_app_number] => 18/619513 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3346 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18619513 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/619513
LOW LATENCY SCRATCH MEMORY PATH Mar 27, 2024 Pending
Array ( [id] => 19499132 [patent_doc_number] => 20240338150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => APPARATUS, SYSTEM, AND METHOD OF DATA ARRAY TRANSFORMATION [patent_app_type] => utility [patent_app_number] => 18/608688 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23035 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608688 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608688
APPARATUS, SYSTEM, AND METHOD OF DATA ARRAY TRANSFORMATION Mar 17, 2024 Pending
Array ( [id] => 19499132 [patent_doc_number] => 20240338150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => APPARATUS, SYSTEM, AND METHOD OF DATA ARRAY TRANSFORMATION [patent_app_type] => utility [patent_app_number] => 18/608688 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23035 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608688 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608688
APPARATUS, SYSTEM, AND METHOD OF DATA ARRAY TRANSFORMATION Mar 17, 2024 Pending
Array ( [id] => 20208469 [patent_doc_number] => 20250278189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-04 [patent_title] => METHOD AND CIRCUIT FOR REDUCING PROCESSING LATENCY [patent_app_type] => utility [patent_app_number] => 18/591662 [patent_app_country] => US [patent_app_date] => 2024-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18591662 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/591662
METHOD AND CIRCUIT FOR REDUCING PROCESSING LATENCY Feb 28, 2024 Pending
Array ( [id] => 20195300 [patent_doc_number] => 20250272010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-28 [patent_title] => MEMORY DEVICE BACKGROUND OPERATION MANAGEMENT FOR LOW HOST BATTERY [patent_app_type] => utility [patent_app_number] => 18/584516 [patent_app_country] => US [patent_app_date] => 2024-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13063 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18584516 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/584516
Memory device background operation management for low host battery Feb 21, 2024 Issued
Array ( [id] => 19405761 [patent_doc_number] => 20240289272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => SYSTEMS AND TECHNIQUES FOR UPDATING LOGICAL-TO-PHYSICAL MAPPINGS [patent_app_type] => utility [patent_app_number] => 18/444421 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17327 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18444421 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/444421
SYSTEMS AND TECHNIQUES FOR UPDATING LOGICAL-TO-PHYSICAL MAPPINGS Feb 15, 2024 Pending
Array ( [id] => 19452415 [patent_doc_number] => 20240312545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => EFUSE UNIT AND APPLICATION CIRCUIT THEREOF [patent_app_type] => utility [patent_app_number] => 18/440635 [patent_app_country] => US [patent_app_date] => 2024-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18440635 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/440635
EFUSE UNIT AND APPLICATION CIRCUIT THEREOF Feb 12, 2024 Pending
Array ( [id] => 20434299 [patent_doc_number] => 12505034 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-23 [patent_title] => Memory system and operation method thereof [patent_app_type] => utility [patent_app_number] => 18/437333 [patent_app_country] => US [patent_app_date] => 2024-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8442 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18437333 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/437333
Memory system and operation method thereof Feb 8, 2024 Issued
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