Search

Michelle J. Lee

Examiner (ID: 2718, Phone: (571)270-7303 , Office: P/3772 )

Most Active Art Unit
3786
Art Unit(s)
3786, 3772, 3793
Total Applications
493
Issued Applications
202
Pending Applications
60
Abandoned Applications
251

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10589648 [patent_doc_number] => 09311265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-12 [patent_title] => 'Techniques for improving throughput and performance of a distributed interconnect peripheral bus connected to a host controller' [patent_app_type] => utility [patent_app_number] => 13/742803 [patent_app_country] => US [patent_app_date] => 2013-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5580 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13742803 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/742803
Techniques for improving throughput and performance of a distributed interconnect peripheral bus connected to a host controller Jan 15, 2013 Issued
Array ( [id] => 9275936 [patent_doc_number] => 08639883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-28 [patent_title] => 'Reducing write amplification in a cache with flash memory used as a write cache' [patent_app_type] => utility [patent_app_number] => 13/742171 [patent_app_country] => US [patent_app_date] => 2013-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7093 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13742171 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/742171
Reducing write amplification in a cache with flash memory used as a write cache Jan 14, 2013 Issued
Array ( [id] => 9270972 [patent_doc_number] => 20140025890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'METHODS AND STRUCTURE FOR IMPROVED FLEXIBILITY IN SHARED STORAGE CACHING BY MULTIPLE SYSTEMS OPERATING AS MULTIPLE VIRTUAL MACHINES' [patent_app_type] => utility [patent_app_number] => 13/712677 [patent_app_country] => US [patent_app_date] => 2012-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6653 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13712677 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/712677
METHODS AND STRUCTURE FOR IMPROVED FLEXIBILITY IN SHARED STORAGE CACHING BY MULTIPLE SYSTEMS OPERATING AS MULTIPLE VIRTUAL MACHINES Dec 11, 2012 Abandoned
Array ( [id] => 9540031 [patent_doc_number] => 20140164678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'INTELLIGENT DETECTION DEVICE OF SOLID STATE HARD DISK COMBINING A PLURALITY OF NAND FLASH MEMORY CARDS AND DETECTING METHOD FOR THE SAME' [patent_app_type] => utility [patent_app_number] => 13/712622 [patent_app_country] => US [patent_app_date] => 2012-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2683 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13712622 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/712622
INTELLIGENT DETECTION DEVICE OF SOLID STATE HARD DISK COMBINING A PLURALITY OF NAND FLASH MEMORY CARDS AND DETECTING METHOD FOR THE SAME Dec 11, 2012 Abandoned
Array ( [id] => 10517793 [patent_doc_number] => 09244840 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-26 [patent_title] => 'Cache swizzle with inline transposition' [patent_app_type] => utility [patent_app_number] => 13/712094 [patent_app_country] => US [patent_app_date] => 2012-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 11683 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13712094 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/712094
Cache swizzle with inline transposition Dec 11, 2012 Issued
Array ( [id] => 8886426 [patent_doc_number] => 20130159610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE RELATED METHOD OF OPERATION' [patent_app_type] => utility [patent_app_number] => 13/711881 [patent_app_country] => US [patent_app_date] => 2012-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11000 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13711881 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/711881
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE RELATED METHOD OF OPERATION Dec 11, 2012 Abandoned
Array ( [id] => 10543563 [patent_doc_number] => 09268695 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-23 [patent_title] => 'Methods and structure for using region locks to divert I/O requests in a storage controller having multiple processing stacks' [patent_app_type] => utility [patent_app_number] => 13/711885 [patent_app_country] => US [patent_app_date] => 2012-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 7214 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 334 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13711885 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/711885
Methods and structure for using region locks to divert I/O requests in a storage controller having multiple processing stacks Dec 11, 2012 Issued
Array ( [id] => 9130150 [patent_doc_number] => 08578106 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-11-05 [patent_title] => 'Method and system for queue demultiplexor with size grouping' [patent_app_type] => utility [patent_app_number] => 13/673348 [patent_app_country] => US [patent_app_date] => 2012-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6157 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13673348 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/673348
Method and system for queue demultiplexor with size grouping Nov 8, 2012 Issued
Array ( [id] => 9302128 [patent_doc_number] => 08650371 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-02-11 [patent_title] => 'Method and system for efficient space management for single-instance-storage volumes' [patent_app_type] => utility [patent_app_number] => 13/668726 [patent_app_country] => US [patent_app_date] => 2012-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6958 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13668726 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/668726
Method and system for efficient space management for single-instance-storage volumes Nov 4, 2012 Issued
Array ( [id] => 8831649 [patent_doc_number] => 20130132694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-23 [patent_title] => 'MICROCOMPUTER AND METHOD FOR CONTROLLING MEMORY ACCESS' [patent_app_type] => utility [patent_app_number] => 13/665639 [patent_app_country] => US [patent_app_date] => 2012-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6204 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13665639 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/665639
Microcomputer and method for controlling memory access Oct 30, 2012 Issued
Array ( [id] => 9702742 [patent_doc_number] => 08827799 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-09-09 [patent_title] => 'Social gaming platform with real world outcomes' [patent_app_type] => utility [patent_app_number] => 13/655639 [patent_app_country] => US [patent_app_date] => 2012-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5654 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13655639 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/655639
Social gaming platform with real world outcomes Oct 18, 2012 Issued
Array ( [id] => 8650561 [patent_doc_number] => 20130036291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-07 [patent_title] => 'GENERATING MULTIPLE ADDRESS SPACE IDENTIFIERS PER VIRTUAL MACHINE TO SWITCH BETWEEN PROTECTED MICRO-CONTEXTS' [patent_app_type] => utility [patent_app_number] => 13/650227 [patent_app_country] => US [patent_app_date] => 2012-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5021 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13650227 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/650227
Generating multiple address space identifiers per virtual machine to switch between protected micro-contexts Oct 11, 2012 Issued
Array ( [id] => 9680443 [patent_doc_number] => 08819370 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-08-26 [patent_title] => 'Techniques for storage lifecycle policy management' [patent_app_type] => utility [patent_app_number] => 13/631603 [patent_app_country] => US [patent_app_date] => 2012-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7747 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13631603 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/631603
Techniques for storage lifecycle policy management Sep 27, 2012 Issued
Array ( [id] => 8588554 [patent_doc_number] => 20130007374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'Checkpointed Tag Prefetcher' [patent_app_type] => utility [patent_app_number] => 13/610071 [patent_app_country] => US [patent_app_date] => 2012-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4143 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13610071 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/610071
Checkpointed tag prefetcher Sep 10, 2012 Issued
Array ( [id] => 8504449 [patent_doc_number] => 20120303857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'Checkpointed Tag Prefetcher' [patent_app_type] => utility [patent_app_number] => 13/564829 [patent_app_country] => US [patent_app_date] => 2012-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4143 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13564829 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/564829
Checkpointed tag prefetcher Aug 1, 2012 Issued
Array ( [id] => 9102633 [patent_doc_number] => 08566526 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Combined transparent/non-transparent cache' [patent_app_type] => utility [patent_app_number] => 13/545526 [patent_app_country] => US [patent_app_date] => 2012-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 10354 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13545526 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/545526
Combined transparent/non-transparent cache Jul 9, 2012 Issued
Array ( [id] => 9207570 [patent_doc_number] => 20140006747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'SYSTEMS AND METHODS FOR PROCESSING INSTRUCTIONS WHEN UTILIZING AN EXTENDED TRANSLATION LOOK-ASIDE BUFFER HAVING A HYBRID MEMORY STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/538251 [patent_app_country] => US [patent_app_date] => 2012-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8221 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13538251 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/538251
SYSTEMS AND METHODS FOR PROCESSING INSTRUCTIONS WHEN UTILIZING AN EXTENDED TRANSLATION LOOK-ASIDE BUFFER HAVING A HYBRID MEMORY STRUCTURE Jun 28, 2012 Abandoned
Array ( [id] => 10536697 [patent_doc_number] => 09262327 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Signature based hit-predicting cache' [patent_app_type] => utility [patent_app_number] => 13/538390 [patent_app_country] => US [patent_app_date] => 2012-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 28 [patent_no_of_words] => 16632 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13538390 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/538390
Signature based hit-predicting cache Jun 28, 2012 Issued
Array ( [id] => 8395570 [patent_doc_number] => 20120233412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-13 [patent_title] => 'MEMORY MANAGEMENT SYSTEM AND METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/477513 [patent_app_country] => US [patent_app_date] => 2012-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2939 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13477513 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/477513
Memory management system and method thereof May 21, 2012 Issued
Array ( [id] => 8861452 [patent_doc_number] => 08464005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-11 [patent_title] => 'Accessing common registers in a multi-core processor' [patent_app_type] => utility [patent_app_number] => 13/464689 [patent_app_country] => US [patent_app_date] => 2012-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4643 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13464689 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/464689
Accessing common registers in a multi-core processor May 3, 2012 Issued
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