
Michelle J. Lee
Examiner (ID: 2718, Phone: (571)270-7303 , Office: P/3772 )
| Most Active Art Unit | 3786 |
| Art Unit(s) | 3786, 3772, 3793 |
| Total Applications | 493 |
| Issued Applications | 202 |
| Pending Applications | 60 |
| Abandoned Applications | 251 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10021354
[patent_doc_number] => 09063840
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-06-23
[patent_title] => 'Multiple match detection for multiple flows in a content addressable memory'
[patent_app_type] => utility
[patent_app_number] => 12/715083
[patent_app_country] => US
[patent_app_date] => 2010-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8473
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12715083
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/715083 | Multiple match detection for multiple flows in a content addressable memory | Feb 28, 2010 | Issued |
Array
(
[id] => 8703811
[patent_doc_number] => 08397047
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-03-12
[patent_title] => 'Logical volume configuration information distribution program, logical volume configuration information distribution method, and logical volume configuration information distribution apparatus'
[patent_app_type] => utility
[patent_app_number] => 12/714903
[patent_app_country] => US
[patent_app_date] => 2010-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 16893
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 219
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12714903
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/714903 | Logical volume configuration information distribution program, logical volume configuration information distribution method, and logical volume configuration information distribution apparatus | Feb 28, 2010 | Issued |
Array
(
[id] => 8872909
[patent_doc_number] => 08468296
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-06-18
[patent_title] => 'Method and apparatus for range encoding in TCAM'
[patent_app_type] => utility
[patent_app_number] => 12/714788
[patent_app_country] => US
[patent_app_date] => 2010-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 15
[patent_no_of_words] => 6293
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12714788
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/714788 | Method and apparatus for range encoding in TCAM | Feb 28, 2010 | Issued |
Array
(
[id] => 8540470
[patent_doc_number] => 08316197
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-11-20
[patent_title] => 'Techniques for storage lifecycle policy management'
[patent_app_type] => utility
[patent_app_number] => 12/714756
[patent_app_country] => US
[patent_app_date] => 2010-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7710
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 246
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12714756
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/714756 | Techniques for storage lifecycle policy management | Feb 28, 2010 | Issued |
Array
(
[id] => 6368446
[patent_doc_number] => 20100088483
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-04-08
[patent_title] => 'DETECTION CIRCUIT FOR MIXED ASYNCHRONOUS AND SYNCHRONOUS MEMORY OPERATION'
[patent_app_type] => utility
[patent_app_number] => 12/634580
[patent_app_country] => US
[patent_app_date] => 2009-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6231
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0088/20100088483.pdf
[firstpage_image] =>[orig_patent_app_number] => 12634580
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/634580 | Detection circuit for mixed asynchronous and synchronous memory operation | Dec 8, 2009 | Issued |
Array
(
[id] => 8472633
[patent_doc_number] => 08301826
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-30
[patent_title] => 'Adaptive mode switching of flash memory address mapping based on host usage characteristics'
[patent_app_type] => utility
[patent_app_number] => 12/609789
[patent_app_country] => US
[patent_app_date] => 2009-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 13
[patent_no_of_words] => 10064
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 251
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12609789
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/609789 | Adaptive mode switching of flash memory address mapping based on host usage characteristics | Oct 29, 2009 | Issued |
Array
(
[id] => 5491873
[patent_doc_number] => 20090292944
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-11-26
[patent_title] => 'Adaptive Deterministic Grouping of Blocks into Multi-Block Units'
[patent_app_type] => utility
[patent_app_number] => 12/512282
[patent_app_country] => US
[patent_app_date] => 2009-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 9555
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0292/20090292944.pdf
[firstpage_image] =>[orig_patent_app_number] => 12512282
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/512282 | Adaptive deterministic grouping of blocks into multi-block units | Jul 29, 2009 | Issued |
Array
(
[id] => 6140540
[patent_doc_number] => 20110010502
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-13
[patent_title] => 'Cache Implementing Multiple Replacement Policies'
[patent_app_type] => utility
[patent_app_number] => 12/500768
[patent_app_country] => US
[patent_app_date] => 2009-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 7914
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0010/20110010502.pdf
[firstpage_image] =>[orig_patent_app_number] => 12500768
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/500768 | Cache implementing multiple replacement policies | Jul 9, 2009 | Issued |
Array
(
[id] => 6140547
[patent_doc_number] => 20110010504
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-13
[patent_title] => 'Combined Transparent/Non-Transparent Cache'
[patent_app_type] => utility
[patent_app_number] => 12/500747
[patent_app_country] => US
[patent_app_date] => 2009-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 10320
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0010/20110010504.pdf
[firstpage_image] =>[orig_patent_app_number] => 12500747
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/500747 | Combined transparent/non-transparent cache | Jul 9, 2009 | Issued |
Array
(
[id] => 8319675
[patent_doc_number] => 08234469
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-07-31
[patent_title] => 'Backup of virtual machines using cloned virtual machines'
[patent_app_type] => utility
[patent_app_number] => 12/500238
[patent_app_country] => US
[patent_app_date] => 2009-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 17
[patent_no_of_words] => 11586
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12500238
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/500238 | Backup of virtual machines using cloned virtual machines | Jul 8, 2009 | Issued |
Array
(
[id] => 6510012
[patent_doc_number] => 20100011168
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-01-14
[patent_title] => 'METHOD AND APPARATUS FOR CACHE FLUSH CONTROL AND WRITE RE-ORDERING IN A DATA STORAGE SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 12/499835
[patent_app_country] => US
[patent_app_date] => 2009-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 7108
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0011/20100011168.pdf
[firstpage_image] =>[orig_patent_app_number] => 12499835
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/499835 | Method and apparatus for cache flush control and write re-ordering in a data storage system | Jul 8, 2009 | Issued |
Array
(
[id] => 6140566
[patent_doc_number] => 20110010512
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-13
[patent_title] => 'METHOD FOR CONTROLLING STORAGE SYSTEM HAVING MULTIPLE NON-VOLATILE MEMORY UNITS AND STORAGE SYSTEM USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/500457
[patent_app_country] => US
[patent_app_date] => 2009-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2412
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0010/20110010512.pdf
[firstpage_image] =>[orig_patent_app_number] => 12500457
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/500457 | METHOD FOR CONTROLLING STORAGE SYSTEM HAVING MULTIPLE NON-VOLATILE MEMORY UNITS AND STORAGE SYSTEM USING THE SAME | Jul 8, 2009 | Abandoned |
Array
(
[id] => 8378232
[patent_doc_number] => 08261040
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-09-04
[patent_title] => 'Data storage device and system having improved write speed'
[patent_app_type] => utility
[patent_app_number] => 12/499984
[patent_app_country] => US
[patent_app_date] => 2009-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3731
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12499984
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/499984 | Data storage device and system having improved write speed | Jul 8, 2009 | Issued |
Array
(
[id] => 6383632
[patent_doc_number] => 20100077135
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-03-25
[patent_title] => 'MEMORY WEAR LEVELING METHOD, SYSTEM AND DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/499859
[patent_app_country] => US
[patent_app_date] => 2009-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4661
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0077/20100077135.pdf
[firstpage_image] =>[orig_patent_app_number] => 12499859
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/499859 | MEMORY WEAR LEVELING METHOD, SYSTEM AND DEVICE | Jul 8, 2009 | Abandoned |
Array
(
[id] => 6140485
[patent_doc_number] => 20110010484
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-13
[patent_title] => 'OPTIMIZED PAGE PROGRAMMING ORDER FOR NON-VOLATILE MEMORY'
[patent_app_type] => utility
[patent_app_number] => 12/499219
[patent_app_country] => US
[patent_app_date] => 2009-07-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7522
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0010/20110010484.pdf
[firstpage_image] =>[orig_patent_app_number] => 12499219
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/499219 | Optimized page programming order for non-volatile memory | Jul 7, 2009 | Issued |
Array
(
[id] => 6140488
[patent_doc_number] => 20110010485
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-13
[patent_title] => 'Flash Memory Control Device'
[patent_app_type] => utility
[patent_app_number] => 12/499502
[patent_app_country] => US
[patent_app_date] => 2009-07-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 832
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0010/20110010485.pdf
[firstpage_image] =>[orig_patent_app_number] => 12499502
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/499502 | Flash Memory Control Device | Jul 7, 2009 | Abandoned |
Array
(
[id] => 6312455
[patent_doc_number] => 20100070697
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-03-18
[patent_title] => 'Memory Controller Circuit, Electronic Apparatus Controller Device and Multifunction Apparatus'
[patent_app_type] => utility
[patent_app_number] => 12/498987
[patent_app_country] => US
[patent_app_date] => 2009-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4256
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0070/20100070697.pdf
[firstpage_image] =>[orig_patent_app_number] => 12498987
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/498987 | Memory Controller Circuit, Electronic Apparatus Controller Device and Multifunction Apparatus | Jul 6, 2009 | Abandoned |
Array
(
[id] => 6633410
[patent_doc_number] => 20100325340
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-23
[patent_title] => 'Memory Wear Control'
[patent_app_type] => utility
[patent_app_number] => 12/489604
[patent_app_country] => US
[patent_app_date] => 2009-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4649
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0325/20100325340.pdf
[firstpage_image] =>[orig_patent_app_number] => 12489604
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/489604 | Memory wear control | Jun 22, 2009 | Issued |
Array
(
[id] => 11266538
[patent_doc_number] => 09490848
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-08
[patent_title] => 'Data handling system comprising memory banks and data rearrangement'
[patent_app_type] => utility
[patent_app_number] => 12/994061
[patent_app_country] => US
[patent_app_date] => 2009-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 8758
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12994061
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/994061 | Data handling system comprising memory banks and data rearrangement | May 18, 2009 | Issued |
Array
(
[id] => 6204035
[patent_doc_number] => 20110066821
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-03-17
[patent_title] => ' DATA HANDLING SYSTEM COMPRISING A REARRANGEMENT NETWORK'
[patent_app_type] => utility
[patent_app_number] => 12/993847
[patent_app_country] => US
[patent_app_date] => 2009-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 11341
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0066/20110066821.pdf
[firstpage_image] =>[orig_patent_app_number] => 12993847
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/993847 | DATA HANDLING SYSTEM COMPRISING A REARRANGEMENT NETWORK | May 18, 2009 | Abandoned |