Michelle J. Lee

Array ( [id] => 7284688 [patent_doc_number] => 20040145961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-29 [patent_title] => 'Portable device having a universal unique identifier' [patent_app_type] => new [patent_app_number] => 10/755264 [patent_app_country] => US [patent_app_date] => 2004-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 855 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20040145961.pdf [firstpage_image] =>[orig_patent_app_number] => 10755264 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7262460 [patent_doc_number] => 20050144516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Adaptive deterministic grouping of blocks into multi-block units' [patent_app_type] => utility [patent_app_number] => 10/750157 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9556 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0144/20050144516.pdf [firstpage_image] =>[orig_patent_app_number] => 10750157 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 208424 [patent_doc_number] => 07631138 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-08 [patent_title] => 'Adaptive mode switching of flash memory address mapping based on host usage characteristics' [patent_app_type] => utility [patent_app_number] => 10/750190 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 10021 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/631/07631138.pdf [firstpage_image] =>[orig_patent_app_number] => 10750190 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6985534 [patent_doc_number] => 20050154962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-14 [patent_title] => 'Method and system to spin up a hard disk prior to a hard disk data exchange request' [patent_app_type] => utility [patent_app_number] => 10/750037 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1954 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20050154962.pdf [firstpage_image] =>[orig_patent_app_number] => 10750037 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7261846 [patent_doc_number] => 20050144359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Method and system to adjust non-volatile cache associativity' [patent_app_type] => utility [patent_app_number] => 10/750040 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1537 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0144/20050144359.pdf [firstpage_image] =>[orig_patent_app_number] => 10750040 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 559109 [patent_doc_number] => 07177986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-13 [patent_title] => 'Direct access mode for a cache' [patent_app_type] => utility [patent_app_number] => 10/748551 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11721 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/177/07177986.pdf [firstpage_image] =>[orig_patent_app_number] => 10748551 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 873488 [patent_doc_number] => 07366872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-29 [patent_title] => 'Method for addressing configuration registers by scanning for a structure in configuration space and adding a known offset' [patent_app_type] => utility [patent_app_number] => 10/750057 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1662 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/366/07366872.pdf [firstpage_image] =>[orig_patent_app_number] => 10750057 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 626318 [patent_doc_number] => 07139864 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-21 [patent_title] => 'Non-volatile memory and method with block management system' [patent_app_type] => utility [patent_app_number] => 10/750155 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 41 [patent_no_of_words] => 19073 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/139/07139864.pdf [firstpage_image] =>[orig_patent_app_number] => 10750155 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7214380 [patent_doc_number] => 20040088487 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Scalable architecture based on single-chip multiprocessing' [patent_app_type] => new [patent_app_number] => 10/693388 [patent_app_country] => US [patent_app_date] => 2003-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12805 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20040088487.pdf [firstpage_image] =>[orig_patent_app_number] => 10693388 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7036210 [patent_doc_number] => 20050033925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-10 [patent_title] => 'Multi-processor computer system with cache-flushing system using memory recall' [patent_app_type] => utility [patent_app_number] => 10/655661 [patent_app_country] => US [patent_app_date] => 2003-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3869 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20050033925.pdf [firstpage_image] =>[orig_patent_app_number] => 10655661 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7089401 [patent_doc_number] => 20050009514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Resource efficient content management and delivery without using a file system' [patent_app_type] => utility [patent_app_number] => 10/615110 [patent_app_country] => US [patent_app_date] => 2003-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2742 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20050009514.pdf [firstpage_image] =>[orig_patent_app_number] => 10615110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1225637 [patent_doc_number] => 06704845 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-09 [patent_title] => 'Snoop filter line replacement for reduction of back invalidates in multi-node architectures' [patent_app_type] => B2 [patent_app_number] => 10/413905 [patent_app_country] => US [patent_app_date] => 2003-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3828 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/704/06704845.pdf [firstpage_image] =>[orig_patent_app_number] => 10413905 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 987722 [patent_doc_number] => 06925542 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-02 [patent_title] => 'Memory management in a data processing system' [patent_app_type] => utility [patent_app_number] => 10/393592 [patent_app_country] => US [patent_app_date] => 2003-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3375 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/925/06925542.pdf [firstpage_image] =>[orig_patent_app_number] => 10393592 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7676225 [patent_doc_number] => 20040153602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'Detection circuit for mixed asynchronous and synchronous memory operation' [patent_app_type] => new [patent_app_number] => 10/357862 [patent_app_country] => US [patent_app_date] => 2003-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6534 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20040153602.pdf [firstpage_image] =>[orig_patent_app_number] => 10357862 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6670445 [patent_doc_number] => 20030115430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'System and method for effectively implementing isochronous processor cache' [patent_app_type] => new [patent_app_number] => 10/352260 [patent_app_country] => US [patent_app_date] => 2003-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5381 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20030115430.pdf [firstpage_image] =>[orig_patent_app_number] => 10352260 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 97194 [patent_doc_number] => 07739451 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-06-15 [patent_title] => 'Method and apparatus for stacked address, bus to memory data transfer' [patent_app_type] => utility [patent_app_number] => 10/331096 [patent_app_country] => US [patent_app_date] => 2002-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7639 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/739/07739451.pdf [firstpage_image] =>[orig_patent_app_number] => 10331096 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1017187 [patent_doc_number] => 06895473 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-17 [patent_title] => 'Data control device and an ATM control device' [patent_app_type] => utility [patent_app_number] => 10/298973 [patent_app_country] => US [patent_app_date] => 2002-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8901 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/895/06895473.pdf [firstpage_image] =>[orig_patent_app_number] => 10298973 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7234224 [patent_doc_number] => 20040073765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-15 [patent_title] => 'Method and system of managing virtualized physical memory in a memory controller and processor system' [patent_app_type] => new [patent_app_number] => 10/268728 [patent_app_country] => US [patent_app_date] => 2002-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6455 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20040073765.pdf [firstpage_image] =>[orig_patent_app_number] => 10268728 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7611352 [patent_doc_number] => 06904490 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-07 [patent_title] => 'Method and system of managing virtualized physical memory in a multi-processor system' [patent_app_type] => utility [patent_app_number] => 10/268743 [patent_app_country] => US [patent_app_date] => 2002-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6033 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/904/06904490.pdf [firstpage_image] =>[orig_patent_app_number] => 10268743 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 992632 [patent_doc_number] => 06920521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-19 [patent_title] => 'Method and system of managing virtualized physical memory in a data processing system' [patent_app_type] => utility [patent_app_number] => 10/268741 [patent_app_country] => US [patent_app_date] => 2002-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5826 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/920/06920521.pdf [firstpage_image] =>[orig_patent_app_number] => 10268741 [rel_patent_id] =>[rel_patent_doc_number] =>)