Search

Michelle J. Lee

Examiner (ID: 2718, Phone: (571)270-7303 , Office: P/3772 )

Most Active Art Unit
3786
Art Unit(s)
3786, 3772, 3793
Total Applications
493
Issued Applications
202
Pending Applications
60
Abandoned Applications
251

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6684998 [patent_doc_number] => 20030120862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Controlling method of storage apparatus, and storage apparatus, disk array device, and disk controller used in the method thereof' [patent_app_type] => new [patent_app_number] => 10/105711 [patent_app_country] => US [patent_app_date] => 2002-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2541 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20030120862.pdf [firstpage_image] =>[orig_patent_app_number] => 10105711 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/105711
Controlling method of storage apparatus, and storage apparatus, disk array device, and disk controller used in the method thereof Mar 20, 2002 Abandoned
Array ( [id] => 1040005 [patent_doc_number] => 06874070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-29 [patent_title] => 'System and method for memory interleaving using cell map with entry grouping for higher-way interleaving' [patent_app_type] => utility [patent_app_number] => 10/080440 [patent_app_country] => US [patent_app_date] => 2002-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 7795 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/874/06874070.pdf [firstpage_image] =>[orig_patent_app_number] => 10080440 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/080440
System and method for memory interleaving using cell map with entry grouping for higher-way interleaving Feb 21, 2002 Issued
Array ( [id] => 5861260 [patent_doc_number] => 20020124147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-05 [patent_title] => 'System for making automatic backup copies of computer files when a personal computer is switched off' [patent_app_type] => new [patent_app_number] => 10/079258 [patent_app_country] => US [patent_app_date] => 2002-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 760 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20020124147.pdf [firstpage_image] =>[orig_patent_app_number] => 10079258 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/079258
System for making automatic backup copies of computer files when a personal computer is switched off Feb 18, 2002 Issued
Array ( [id] => 975431 [patent_doc_number] => 06938129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'Distributed memory module cache' [patent_app_type] => utility [patent_app_number] => 10/039648 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4600 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/938/06938129.pdf [firstpage_image] =>[orig_patent_app_number] => 10039648 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039648
Distributed memory module cache Dec 30, 2001 Issued
Array ( [id] => 6763013 [patent_doc_number] => 20030126375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => ' Coherency techniques for suspending execution of a thread until a specified memory access occurs' [patent_app_type] => new [patent_app_number] => 10/039656 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7715 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20030126375.pdf [firstpage_image] =>[orig_patent_app_number] => 10039656 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039656
Coherency techniques for suspending execution of a thread until a specified memory access occurs Dec 30, 2001 Issued
Array ( [id] => 981624 [patent_doc_number] => 06931505 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Distributed memory module cache command formatting' [patent_app_type] => utility [patent_app_number] => 10/039651 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4558 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/931/06931505.pdf [firstpage_image] =>[orig_patent_app_number] => 10039651 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039651
Distributed memory module cache command formatting Dec 30, 2001 Issued
Array ( [id] => 6762995 [patent_doc_number] => 20030126357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Method and apparatus for dynamic memory refreshing' [patent_app_type] => new [patent_app_number] => 10/036838 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5665 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20030126357.pdf [firstpage_image] =>[orig_patent_app_number] => 10036838 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/036838
Method and apparatus for dynamic memory refreshing Dec 30, 2001 Issued
Array ( [id] => 846177 [patent_doc_number] => 07389387 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-17 [patent_title] => 'Distributed memory module cache writeback' [patent_app_type] => utility [patent_app_number] => 10/039596 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4585 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/389/07389387.pdf [firstpage_image] =>[orig_patent_app_number] => 10039596 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039596
Distributed memory module cache writeback Dec 30, 2001 Issued
Array ( [id] => 1214326 [patent_doc_number] => 06715024 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-30 [patent_title] => 'Multi-bank memory device having a 1:1 state machine-to-memory bank ratio' [patent_app_type] => B1 [patent_app_number] => 10/036695 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7985 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/715/06715024.pdf [firstpage_image] =>[orig_patent_app_number] => 10036695 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/036695
Multi-bank memory device having a 1:1 state machine-to-memory bank ratio Dec 30, 2001 Issued
Array ( [id] => 1049599 [patent_doc_number] => 06865646 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-08 [patent_title] => 'Segmented distributed memory module cache' [patent_app_type] => utility [patent_app_number] => 10/039612 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4603 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/865/06865646.pdf [firstpage_image] =>[orig_patent_app_number] => 10039612 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039612
Segmented distributed memory module cache Dec 30, 2001 Issued
Array ( [id] => 6839870 [patent_doc_number] => 20030037210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'System for head and tail caching' [patent_app_type] => new [patent_app_number] => 10/039953 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4739 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20030037210.pdf [firstpage_image] =>[orig_patent_app_number] => 10039953 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039953
System for head and tail caching Dec 30, 2001 Issued
Array ( [id] => 586471 [patent_doc_number] => 07467274 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-16 [patent_title] => 'Method to increase the life span of limited cycle read/write media' [patent_app_type] => utility [patent_app_number] => 10/039018 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 4106 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/467/07467274.pdf [firstpage_image] =>[orig_patent_app_number] => 10039018 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039018
Method to increase the life span of limited cycle read/write media Dec 30, 2001 Issued
Array ( [id] => 987704 [patent_doc_number] => 06925534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-02 [patent_title] => 'Distributed memory module cache prefetch' [patent_app_type] => utility [patent_app_number] => 10/039580 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4746 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/925/06925534.pdf [firstpage_image] =>[orig_patent_app_number] => 10039580 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039580
Distributed memory module cache prefetch Dec 30, 2001 Issued
Array ( [id] => 6763019 [patent_doc_number] => 20030126381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Low latency lock for multiprocessor computer system' [patent_app_type] => new [patent_app_number] => 10/039045 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4400 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20030126381.pdf [firstpage_image] =>[orig_patent_app_number] => 10039045 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039045
Low latency lock for multiprocessor computer system Dec 30, 2001 Issued
Array ( [id] => 1033693 [patent_doc_number] => 06880044 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-12 [patent_title] => 'Distributed memory module cache tag look-up' [patent_app_type] => utility [patent_app_number] => 10/039597 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4645 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/880/06880044.pdf [firstpage_image] =>[orig_patent_app_number] => 10039597 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039597
Distributed memory module cache tag look-up Dec 30, 2001 Issued
Array ( [id] => 6675841 [patent_doc_number] => 20030061444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Method and system for cache management algorithm selection' [patent_app_type] => new [patent_app_number] => 10/014371 [patent_app_country] => US [patent_app_date] => 2001-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7695 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20030061444.pdf [firstpage_image] =>[orig_patent_app_number] => 10014371 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/014371
Method and system for cache management algorithm selection Dec 10, 2001 Issued
Array ( [id] => 978745 [patent_doc_number] => 06934821 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-23 [patent_title] => 'Memory management apparatus, memory management method, memory management program and computer readable storage medium therein' [patent_app_type] => utility [patent_app_number] => 10/012041 [patent_app_country] => US [patent_app_date] => 2001-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7672 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/934/06934821.pdf [firstpage_image] =>[orig_patent_app_number] => 10012041 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/012041
Memory management apparatus, memory management method, memory management program and computer readable storage medium therein Dec 10, 2001 Issued
Array ( [id] => 6675866 [patent_doc_number] => 20030061469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Filtering basic instruction segments in a processor front-end for power conservation' [patent_app_type] => new [patent_app_number] => 09/961202 [patent_app_country] => US [patent_app_date] => 2001-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4188 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20030061469.pdf [firstpage_image] =>[orig_patent_app_number] => 09961202 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/961202
Filtering basic instruction segments in a processor front-end for power conservation Sep 23, 2001 Issued
Array ( [id] => 6722385 [patent_doc_number] => 20030056075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'Shared memory array' [patent_app_type] => new [patent_app_number] => 09/953751 [patent_app_country] => US [patent_app_date] => 2001-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4996 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20030056075.pdf [firstpage_image] =>[orig_patent_app_number] => 09953751 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/953751
Shared memory array Sep 13, 2001 Issued
Array ( [id] => 6722382 [patent_doc_number] => 20030056072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'System and method for providing data to multi-function memory' [patent_app_type] => new [patent_app_number] => 09/953752 [patent_app_country] => US [patent_app_date] => 2001-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5044 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20030056072.pdf [firstpage_image] =>[orig_patent_app_number] => 09953752 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/953752
System and method for providing data to multi-function memory Sep 13, 2001 Issued
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