Search

Michelle J. Lee

Examiner (ID: 2718, Phone: (571)270-7303 , Office: P/3772 )

Most Active Art Unit
3786
Art Unit(s)
3786, 3772, 3793
Total Applications
493
Issued Applications
202
Pending Applications
60
Abandoned Applications
251

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6722372 [patent_doc_number] => 20030056062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'Preemptive write back controller' [patent_app_type] => new [patent_app_number] => 09/952994 [patent_app_country] => US [patent_app_date] => 2001-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4538 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20030056062.pdf [firstpage_image] =>[orig_patent_app_number] => 09952994 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/952994
Preemptive write back controller Sep 13, 2001 Issued
09/936479 Method for the management of data received via a data bus, and apparatus for carrying out the method Sep 12, 2001 Abandoned
Array ( [id] => 6756131 [patent_doc_number] => 20030003908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'Method and apparatus for storing data in flash memory' [patent_app_type] => new [patent_app_number] => 09/892816 [patent_app_country] => US [patent_app_date] => 2001-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5293 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20030003908.pdf [firstpage_image] =>[orig_patent_app_number] => 09892816 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/892816
Method and apparatus for storing data in flash memory Jun 26, 2001 Issued
Array ( [id] => 671526 [patent_doc_number] => 07096324 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-08-22 [patent_title] => 'Embedded processor with dual-port SRAM for programmable logic' [patent_app_type] => utility [patent_app_number] => 09/881226 [patent_app_country] => US [patent_app_date] => 2001-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 27 [patent_no_of_words] => 11107 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/096/07096324.pdf [firstpage_image] =>[orig_patent_app_number] => 09881226 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/881226
Embedded processor with dual-port SRAM for programmable logic Jun 11, 2001 Issued
Array ( [id] => 626338 [patent_doc_number] => 07139873 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-11-21 [patent_title] => 'System and method for caching data streams on a storage media' [patent_app_type] => utility [patent_app_number] => 09/877263 [patent_app_country] => US [patent_app_date] => 2001-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3270 [patent_no_of_claims] => 70 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/139/07139873.pdf [firstpage_image] =>[orig_patent_app_number] => 09877263 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/877263
System and method for caching data streams on a storage media Jun 7, 2001 Issued
Array ( [id] => 1250238 [patent_doc_number] => 06675262 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-06 [patent_title] => 'Multi-processor computer system with cache-flushing system using memory recall' [patent_app_type] => B1 [patent_app_number] => 09/877368 [patent_app_country] => US [patent_app_date] => 2001-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3840 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/675/06675262.pdf [firstpage_image] =>[orig_patent_app_number] => 09877368 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/877368
Multi-processor computer system with cache-flushing system using memory recall Jun 7, 2001 Issued
Array ( [id] => 1260455 [patent_doc_number] => 06668308 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-23 [patent_title] => 'Scalable architecture based on single-chip multiprocessing' [patent_app_type] => B2 [patent_app_number] => 09/877793 [patent_app_country] => US [patent_app_date] => 2001-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 12694 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/668/06668308.pdf [firstpage_image] =>[orig_patent_app_number] => 09877793 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/877793
Scalable architecture based on single-chip multiprocessing Jun 7, 2001 Issued
Array ( [id] => 782191 [patent_doc_number] => 06996660 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-02-07 [patent_title] => 'Memory device and method for storing and reading data in a write-once memory array' [patent_app_type] => utility [patent_app_number] => 09/877720 [patent_app_country] => US [patent_app_date] => 2001-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 5410 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/996/06996660.pdf [firstpage_image] =>[orig_patent_app_number] => 09877720 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/877720
Memory device and method for storing and reading data in a write-once memory array Jun 7, 2001 Issued
Array ( [id] => 713189 [patent_doc_number] => 07062602 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-06-13 [patent_title] => 'Method for reading data in a write-once memory device using a write-many file system' [patent_app_type] => utility [patent_app_number] => 09/878138 [patent_app_country] => US [patent_app_date] => 2001-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 7314 [patent_no_of_claims] => 115 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/062/07062602.pdf [firstpage_image] =>[orig_patent_app_number] => 09878138 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/878138
Method for reading data in a write-once memory device using a write-many file system Jun 7, 2001 Issued
Array ( [id] => 6265378 [patent_doc_number] => 20020188817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-12 [patent_title] => 'Store buffer pipeline' [patent_app_type] => new [patent_app_number] => 09/877704 [patent_app_country] => US [patent_app_date] => 2001-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7964 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20020188817.pdf [firstpage_image] =>[orig_patent_app_number] => 09877704 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/877704
Store buffer pipeline Jun 7, 2001 Abandoned
Array ( [id] => 7623843 [patent_doc_number] => 06725334 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-20 [patent_title] => 'Method and system for exclusive two-level caching in a chip-multiprocessor' [patent_app_type] => B2 [patent_app_number] => 09/877530 [patent_app_country] => US [patent_app_date] => 2001-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5299 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 11 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/725/06725334.pdf [firstpage_image] =>[orig_patent_app_number] => 09877530 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/877530
Method and system for exclusive two-level caching in a chip-multiprocessor Jun 7, 2001 Issued
Array ( [id] => 1185811 [patent_doc_number] => 06745294 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-01 [patent_title] => 'Multi-processor computer system with lock driven cache-flushing system' [patent_app_type] => B1 [patent_app_number] => 09/877539 [patent_app_country] => US [patent_app_date] => 2001-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4522 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/745/06745294.pdf [firstpage_image] =>[orig_patent_app_number] => 09877539 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/877539
Multi-processor computer system with lock driven cache-flushing system Jun 7, 2001 Issued
Array ( [id] => 777833 [patent_doc_number] => 07003619 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-02-21 [patent_title] => 'Memory device and method for storing and reading a file system structure in a write-once memory array' [patent_app_type] => utility [patent_app_number] => 09/877719 [patent_app_country] => US [patent_app_date] => 2001-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 27 [patent_no_of_words] => 9033 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/003/07003619.pdf [firstpage_image] =>[orig_patent_app_number] => 09877719 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/877719
Memory device and method for storing and reading a file system structure in a write-once memory array Jun 7, 2001 Issued
Array ( [id] => 6133973 [patent_doc_number] => 20020078296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'Method and apparatus for resynchronizing paired volumes via communication line' [patent_app_type] => new [patent_app_number] => 09/797479 [patent_app_country] => US [patent_app_date] => 2001-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9523 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20020078296.pdf [firstpage_image] =>[orig_patent_app_number] => 09797479 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/797479
Method and apparatus for resynchronizing paired volumes via communication line Feb 27, 2001 Issued
Array ( [id] => 1240855 [patent_doc_number] => 06691213 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-10 [patent_title] => 'Computer system and method for accessing a protected partition of a disk drive that lies beyond a limited address range of a host computer\'s BIOS' [patent_app_type] => B1 [patent_app_number] => 09/796915 [patent_app_country] => US [patent_app_date] => 2001-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2986 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/691/06691213.pdf [firstpage_image] =>[orig_patent_app_number] => 09796915 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/796915
Computer system and method for accessing a protected partition of a disk drive that lies beyond a limited address range of a host computer's BIOS Feb 27, 2001 Issued
Array ( [id] => 7629985 [patent_doc_number] => 06636954 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-21 [patent_title] => 'Method and apparatus for inter-disk copy processing, and a computer product' [patent_app_type] => B2 [patent_app_number] => 09/782247 [patent_app_country] => US [patent_app_date] => 2001-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8883 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/636/06636954.pdf [firstpage_image] =>[orig_patent_app_number] => 09782247 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/782247
Method and apparatus for inter-disk copy processing, and a computer product Feb 12, 2001 Issued
Array ( [id] => 7610022 [patent_doc_number] => 06842837 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-11 [patent_title] => 'Method and apparatus for a burst write in a shared bus architecture' [patent_app_type] => utility [patent_app_number] => 09/784274 [patent_app_country] => US [patent_app_date] => 2001-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3516 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/842/06842837.pdf [firstpage_image] =>[orig_patent_app_number] => 09784274 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/784274
Method and apparatus for a burst write in a shared bus architecture Feb 12, 2001 Issued
Array ( [id] => 6283184 [patent_doc_number] => 20020108021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-08 [patent_title] => 'High performance cache and method for operating same' [patent_app_type] => new [patent_app_number] => 09/779803 [patent_app_country] => US [patent_app_date] => 2001-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 19555 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20020108021.pdf [firstpage_image] =>[orig_patent_app_number] => 09779803 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/779803
High performance cache and method for operating same Feb 7, 2001 Abandoned
Array ( [id] => 7029730 [patent_doc_number] => 20010014932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-16 [patent_title] => 'Multi-processor system' [patent_app_type] => new [patent_app_number] => 09/777771 [patent_app_country] => US [patent_app_date] => 2001-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3352 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20010014932.pdf [firstpage_image] =>[orig_patent_app_number] => 09777771 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/777771
Multi-processor system Feb 7, 2001 Abandoned
Array ( [id] => 6283163 [patent_doc_number] => 20020108016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-08 [patent_title] => 'System for characterizing performance of data handling systems under particular stimuli' [patent_app_type] => new [patent_app_number] => 09/778130 [patent_app_country] => US [patent_app_date] => 2001-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6383 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20020108016.pdf [firstpage_image] =>[orig_patent_app_number] => 09778130 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/778130
System for characterizing performance of data handling systems under particular stimuli Feb 5, 2001 Abandoned
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