Search

Michelle J. Lee

Examiner (ID: 2718, Phone: (571)270-7303 , Office: P/3772 )

Most Active Art Unit
3786
Art Unit(s)
3786, 3772, 3793
Total Applications
493
Issued Applications
202
Pending Applications
60
Abandoned Applications
251

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1365440 [patent_doc_number] => 06581150 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'Apparatus and method for improved non-page fault loads and stores' [patent_app_type] => B1 [patent_app_number] => 09/640117 [patent_app_country] => US [patent_app_date] => 2000-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11947 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/581/06581150.pdf [firstpage_image] =>[orig_patent_app_number] => 09640117 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/640117
Apparatus and method for improved non-page fault loads and stores Aug 15, 2000 Issued
Array ( [id] => 1196966 [patent_doc_number] => 06732234 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-04 [patent_title] => 'Direct access mode for a cache' [patent_app_type] => B1 [patent_app_number] => 09/633544 [patent_app_country] => US [patent_app_date] => 2000-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11678 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/732/06732234.pdf [firstpage_image] =>[orig_patent_app_number] => 09633544 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/633544
Direct access mode for a cache Aug 6, 2000 Issued
Array ( [id] => 1068311 [patent_doc_number] => 06848024 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-25 [patent_title] => 'Programmably disabling one or more cache entries' [patent_app_type] => utility [patent_app_number] => 09/633683 [patent_app_country] => US [patent_app_date] => 2000-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 9102 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/848/06848024.pdf [firstpage_image] =>[orig_patent_app_number] => 09633683 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/633683
Programmably disabling one or more cache entries Aug 6, 2000 Issued
Array ( [id] => 1184691 [patent_doc_number] => 06748487 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-08 [patent_title] => 'Disk cache control method, disk array system, and storage system' [patent_app_type] => B1 [patent_app_number] => 09/601480 [patent_app_country] => US [patent_app_date] => 2000-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 9772 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/748/06748487.pdf [firstpage_image] =>[orig_patent_app_number] => 09601480 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/601480
Disk cache control method, disk array system, and storage system Aug 2, 2000 Issued
Array ( [id] => 1416839 [patent_doc_number] => 06532515 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-11 [patent_title] => 'Method and apparatus for performing selective data reads from a memory' [patent_app_type] => B1 [patent_app_number] => 09/630914 [patent_app_country] => US [patent_app_date] => 2000-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4482 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/532/06532515.pdf [firstpage_image] =>[orig_patent_app_number] => 09630914 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/630914
Method and apparatus for performing selective data reads from a memory Aug 1, 2000 Issued
Array ( [id] => 1169541 [patent_doc_number] => 06763428 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-13 [patent_title] => 'Methods and systems for performing push-pull optimization of files while file storage allocations are actively changing' [patent_app_type] => B1 [patent_app_number] => 09/630654 [patent_app_country] => US [patent_app_date] => 2000-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6727 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/763/06763428.pdf [firstpage_image] =>[orig_patent_app_number] => 09630654 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/630654
Methods and systems for performing push-pull optimization of files while file storage allocations are actively changing Aug 1, 2000 Issued
09/607041 Interface command architecture for synchronous flash memory Jun 29, 2000 Abandoned
Array ( [id] => 1250231 [patent_doc_number] => 06675255 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-06 [patent_title] => 'Device initialize command for a synchronous memory' [patent_app_type] => B1 [patent_app_number] => 09/607377 [patent_app_country] => US [patent_app_date] => 2000-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 7969 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/675/06675255.pdf [firstpage_image] =>[orig_patent_app_number] => 09607377 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/607377
Device initialize command for a synchronous memory Jun 29, 2000 Issued
Array ( [id] => 1324062 [patent_doc_number] => 06611905 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-26 [patent_title] => 'Memory interface with programable clock to output time based on wide range of receiver loads' [patent_app_type] => B1 [patent_app_number] => 09/607139 [patent_app_country] => US [patent_app_date] => 2000-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2428 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/611/06611905.pdf [firstpage_image] =>[orig_patent_app_number] => 09607139 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/607139
Memory interface with programable clock to output time based on wide range of receiver loads Jun 28, 2000 Issued
Array ( [id] => 1376863 [patent_doc_number] => 06578109 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-10 [patent_title] => 'System and method for effectively implementing isochronous processor cache' [patent_app_type] => B1 [patent_app_number] => 09/606813 [patent_app_country] => US [patent_app_date] => 2000-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5260 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/578/06578109.pdf [firstpage_image] =>[orig_patent_app_number] => 09606813 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/606813
System and method for effectively implementing isochronous processor cache Jun 28, 2000 Issued
Array ( [id] => 7630000 [patent_doc_number] => 06636939 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-21 [patent_title] => 'Method and apparatus for processor bypass path to system memory' [patent_app_type] => B1 [patent_app_number] => 09/607537 [patent_app_country] => US [patent_app_date] => 2000-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5283 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/636/06636939.pdf [firstpage_image] =>[orig_patent_app_number] => 09607537 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/607537
Method and apparatus for processor bypass path to system memory Jun 28, 2000 Issued
Array ( [id] => 1347790 [patent_doc_number] => 06598123 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-22 [patent_title] => 'Snoop filter line replacement for reduction of back invalidates in multi-node architectures' [patent_app_type] => B1 [patent_app_number] => 09/606848 [patent_app_country] => US [patent_app_date] => 2000-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3808 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/598/06598123.pdf [firstpage_image] =>[orig_patent_app_number] => 09606848 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/606848
Snoop filter line replacement for reduction of back invalidates in multi-node architectures Jun 27, 2000 Issued
Array ( [id] => 7623836 [patent_doc_number] => 06725341 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-20 [patent_title] => 'Cache line pre-load and pre-own based on cache coherence speculation' [patent_app_type] => B1 [patent_app_number] => 09/605239 [patent_app_country] => US [patent_app_date] => 2000-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3369 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 8 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/725/06725341.pdf [firstpage_image] =>[orig_patent_app_number] => 09605239 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/605239
Cache line pre-load and pre-own based on cache coherence speculation Jun 27, 2000 Issued
Array ( [id] => 1185774 [patent_doc_number] => 06745281 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-01 [patent_title] => 'Fiber channel connection magnetic disk device and fiber channel connection magnetic disk controller' [patent_app_type] => B1 [patent_app_number] => 09/604914 [patent_app_country] => US [patent_app_date] => 2000-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 9312 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/745/06745281.pdf [firstpage_image] =>[orig_patent_app_number] => 09604914 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/604914
Fiber channel connection magnetic disk device and fiber channel connection magnetic disk controller Jun 27, 2000 Issued
Array ( [id] => 1109740 [patent_doc_number] => 06813686 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-02 [patent_title] => 'Method and apparatus for identifying logical volumes in multiple element computer storage domains' [patent_app_type] => B1 [patent_app_number] => 09/604853 [patent_app_country] => US [patent_app_date] => 2000-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 29 [patent_no_of_words] => 19080 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/813/06813686.pdf [firstpage_image] =>[orig_patent_app_number] => 09604853 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/604853
Method and apparatus for identifying logical volumes in multiple element computer storage domains Jun 26, 2000 Issued
Array ( [id] => 1001718 [patent_doc_number] => 06912637 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-06-28 [patent_title] => 'Apparatus and method for managing memory in a network switch' [patent_app_type] => utility [patent_app_number] => 09/602474 [patent_app_country] => US [patent_app_date] => 2000-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 40 [patent_no_of_words] => 38542 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/912/06912637.pdf [firstpage_image] =>[orig_patent_app_number] => 09602474 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/602474
Apparatus and method for managing memory in a network switch Jun 22, 2000 Issued
Array ( [id] => 1225571 [patent_doc_number] => 06704842 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-09 [patent_title] => 'Multi-processor system with proactive speculative data transfer' [patent_app_type] => B1 [patent_app_number] => 09/548009 [patent_app_country] => US [patent_app_date] => 2000-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5840 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/704/06704842.pdf [firstpage_image] =>[orig_patent_app_number] => 09548009 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/548009
Multi-processor system with proactive speculative data transfer Apr 11, 2000 Issued
Array ( [id] => 1509025 [patent_doc_number] => 06467027 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'Method and system for an INUSE field resource management scheme' [patent_app_type] => B1 [patent_app_number] => 09/475746 [patent_app_country] => US [patent_app_date] => 1999-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7633 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/467/06467027.pdf [firstpage_image] =>[orig_patent_app_number] => 09475746 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/475746
Method and system for an INUSE field resource management scheme Dec 29, 1999 Issued
Array ( [id] => 1250247 [patent_doc_number] => 06675271 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-06 [patent_title] => 'PACS archive techniques' [patent_app_type] => B1 [patent_app_number] => 09/464246 [patent_app_country] => US [patent_app_date] => 1999-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1052 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/675/06675271.pdf [firstpage_image] =>[orig_patent_app_number] => 09464246 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/464246
PACS archive techniques Dec 15, 1999 Issued
Array ( [id] => 7613856 [patent_doc_number] => 06898675 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-24 [patent_title] => 'Data received before coherency window for a snoopy bus' [patent_app_type] => utility [patent_app_number] => 09/138380 [patent_app_country] => US [patent_app_date] => 1998-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2478 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/898/06898675.pdf [firstpage_image] =>[orig_patent_app_number] => 09138380 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/138380
Data received before coherency window for a snoopy bus Aug 23, 1998 Issued
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