Search

Midys Rojas

Examiner (ID: 13731, Phone: (571)272-4207 , Office: P/2133 )

Most Active Art Unit
2133
Art Unit(s)
2188, 2133, 2185, 2189
Total Applications
1110
Issued Applications
934
Pending Applications
61
Abandoned Applications
132

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14364175 [patent_doc_number] => 10303390 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-05-28 [patent_title] => Resolving fingerprint collisions in flash storage system [patent_app_type] => utility [patent_app_number] => 15/581660 [patent_app_country] => US [patent_app_date] => 2017-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 27512 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15581660 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/581660
Resolving fingerprint collisions in flash storage system Apr 27, 2017 Issued
Array ( [id] => 15854475 [patent_doc_number] => 10642520 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-05-05 [patent_title] => Memory optimized data shuffle [patent_app_type] => utility [patent_app_number] => 15/490430 [patent_app_country] => US [patent_app_date] => 2017-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5977 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15490430 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/490430
Memory optimized data shuffle Apr 17, 2017 Issued
Array ( [id] => 13185703 [patent_doc_number] => 10108371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-23 [patent_title] => Method and system for managing host memory buffer of host using non-volatile memory express (NVME) controller in solid state storage device [patent_app_type] => utility [patent_app_number] => 15/489853 [patent_app_country] => US [patent_app_date] => 2017-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4663 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15489853 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/489853
Method and system for managing host memory buffer of host using non-volatile memory express (NVME) controller in solid state storage device Apr 17, 2017 Issued
Array ( [id] => 13417477 [patent_doc_number] => 20180260281 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-13 [patent_title] => RESTORING A STORAGE VOLUME FROM A BACKUP [patent_app_type] => utility [patent_app_number] => 15/453042 [patent_app_country] => US [patent_app_date] => 2017-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5718 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15453042 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/453042
RESTORING A STORAGE VOLUME FROM A BACKUP Mar 7, 2017 Abandoned
Array ( [id] => 13304137 [patent_doc_number] => 20180203605 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-19 [patent_title] => DATA TRANSMITTING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT [patent_app_type] => utility [patent_app_number] => 15/452737 [patent_app_country] => US [patent_app_date] => 2017-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11656 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15452737 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/452737
Data transmitting method, memory storage device and memory control circuit unit Mar 7, 2017 Issued
Array ( [id] => 13083317 [patent_doc_number] => 10061725 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-28 [patent_title] => Scanning memory for de-duplication using RDMA [patent_app_type] => utility [patent_app_number] => 15/424912 [patent_app_country] => US [patent_app_date] => 2017-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7103 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15424912 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/424912
Scanning memory for de-duplication using RDMA Feb 5, 2017 Issued
Array ( [id] => 12147405 [patent_doc_number] => 09881662 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-30 [patent_title] => 'Method and apparatus for calibrating write timing in a memory system' [patent_app_type] => utility [patent_app_number] => 15/406373 [patent_app_country] => US [patent_app_date] => 2017-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 6442 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15406373 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/406373
Method and apparatus for calibrating write timing in a memory system Jan 12, 2017 Issued
Array ( [id] => 14614769 [patent_doc_number] => 10360085 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-23 [patent_title] => Method and apparatus for identifying process use on storage array resources [patent_app_type] => utility [patent_app_number] => 15/390949 [patent_app_country] => US [patent_app_date] => 2016-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4986 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15390949 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/390949
Method and apparatus for identifying process use on storage array resources Dec 26, 2016 Issued
Array ( [id] => 15169473 [patent_doc_number] => 10490239 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-26 [patent_title] => Programmable data pattern for repeated writes to memory [patent_app_type] => utility [patent_app_number] => 15/391684 [patent_app_country] => US [patent_app_date] => 2016-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 19171 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15391684 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/391684
Programmable data pattern for repeated writes to memory Dec 26, 2016 Issued
Array ( [id] => 12241839 [patent_doc_number] => 20180074702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-15 [patent_title] => 'MEMORY TRANSACTION-LEVEL MODELING METHOD AND SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/391082 [patent_app_country] => US [patent_app_date] => 2016-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10961 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15391082 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/391082
Memory transaction-level modeling method and system Dec 26, 2016 Issued
Array ( [id] => 15788699 [patent_doc_number] => 10628073 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-04-21 [patent_title] => Compression and encryption aware optimized data moving across a network [patent_app_type] => utility [patent_app_number] => 15/386935 [patent_app_country] => US [patent_app_date] => 2016-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6171 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15386935 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/386935
Compression and encryption aware optimized data moving across a network Dec 20, 2016 Issued
Array ( [id] => 15730683 [patent_doc_number] => 10613770 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => Method and apparatus for controlling access to a disk array [patent_app_type] => utility [patent_app_number] => 15/384769 [patent_app_country] => US [patent_app_date] => 2016-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6065 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15384769 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/384769
Method and apparatus for controlling access to a disk array Dec 19, 2016 Issued
Array ( [id] => 12248984 [patent_doc_number] => 09921758 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-20 [patent_title] => 'Avoiding long access latencies in redundant storage systems' [patent_app_type] => utility [patent_app_number] => 15/382869 [patent_app_country] => US [patent_app_date] => 2016-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5329 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15382869 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/382869
Avoiding long access latencies in redundant storage systems Dec 18, 2016 Issued
Array ( [id] => 14202581 [patent_doc_number] => 10268406 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Information storage device, information storage system, and information storage control program [patent_app_type] => utility [patent_app_number] => 15/382417 [patent_app_country] => US [patent_app_date] => 2016-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 12057 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15382417 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/382417
Information storage device, information storage system, and information storage control program Dec 15, 2016 Issued
Array ( [id] => 11531109 [patent_doc_number] => 20170091087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-30 [patent_title] => 'METHOD FOR REFRESHING DYNAMIC RANDOM ACCESS MEMORY AND A COMPUTER SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/373888 [patent_app_country] => US [patent_app_date] => 2016-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8080 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15373888 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/373888
Method for refreshing dynamic random access memory and a computer system Dec 8, 2016 Issued
Array ( [id] => 12735667 [patent_doc_number] => 20180137056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => PROCESSOR WITH INSTRUCTION CACHE THAT PERFORMS ZERO CLOCK RETIRES [patent_app_type] => utility [patent_app_number] => 15/364487 [patent_app_country] => US [patent_app_date] => 2016-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11831 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15364487 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/364487
Processor with instruction cache that performs zero clock retires Nov 29, 2016 Issued
Array ( [id] => 13120455 [patent_doc_number] => 10078581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-18 [patent_title] => Processor with instruction cache that performs zero clock retires [patent_app_type] => utility [patent_app_number] => 15/350356 [patent_app_country] => US [patent_app_date] => 2016-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 11846 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15350356 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/350356
Processor with instruction cache that performs zero clock retires Nov 13, 2016 Issued
Array ( [id] => 14982649 [patent_doc_number] => 10445236 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-15 [patent_title] => Method to consistently store large amounts of data at very high speed in persistent memory systems [patent_app_type] => utility [patent_app_number] => 15/350428 [patent_app_country] => US [patent_app_date] => 2016-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6632 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15350428 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/350428
Method to consistently store large amounts of data at very high speed in persistent memory systems Nov 13, 2016 Issued
Array ( [id] => 11473953 [patent_doc_number] => 20170060736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'Dynamic Memory Sharing' [patent_app_type] => utility [patent_app_number] => 15/350607 [patent_app_country] => US [patent_app_date] => 2016-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7503 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15350607 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/350607
Dynamic Memory Sharing Nov 13, 2016 Abandoned
Array ( [id] => 12221606 [patent_doc_number] => 20180059967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'MEMORY DEVICE AND SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/350651 [patent_app_country] => US [patent_app_date] => 2016-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7420 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15350651 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/350651
Memory device and system including the same Nov 13, 2016 Issued
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