Mikado Ryan Buiz
Examiner (ID: 12419, Phone: (571)272-6578 , Office: P/3600 )
Most Active Art Unit | 3506 |
Art Unit(s) | 3731, 2899, 3506 |
Total Applications | 2305 |
Issued Applications | 2195 |
Pending Applications | 18 |
Abandoned Applications | 92 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 7592847
[patent_doc_number] => 07652354
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[patent_title] => 'Semiconductor devices and methods of manufacturing semiconductor devices'
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[patent_app_country] => US
[patent_app_date] => 2006-11-01
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[pdf_file] => patents/07/652/07652354.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/555381 | Semiconductor devices and methods of manufacturing semiconductor devices | Oct 31, 2006 | Issued |
Array
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[patent_issue_date] => 2008-01-03
[patent_title] => 'Method of manufacturing a pattern'
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[firstpage_image] =>[orig_patent_app_number] => 11591951
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/591951 | Method of manufacturing a pattern | Oct 31, 2006 | Abandoned |
Array
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[id] => 4893501
[patent_doc_number] => 20080102599
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[patent_kind] => A1
[patent_issue_date] => 2008-05-01
[patent_title] => 'REDUCED LEAKAGE INTERCONNECT STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 11/554612
[patent_app_country] => US
[patent_app_date] => 2006-10-31
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/554612 | Reduced leakage interconnect structure | Oct 30, 2006 | Issued |
11/589102 | Multilayer substrate, electronic component and apparatus having the same, manufacturing method of the same, and its transmission characteristic control method | Oct 29, 2006 | Abandoned |
Array
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[id] => 7689409
[patent_doc_number] => 20070105289
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[patent_issue_date] => 2007-05-10
[patent_title] => 'Method of manufacturing semiconductor device'
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Array
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[patent_title] => 'Method of forming a mask structure and method of forming a minute pattern using the same'
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Array
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[patent_title] => 'Forming of a cavity in an insulating layer'
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Array
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[id] => 5247459
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[patent_title] => 'INTEGRATED PROCESS MODULATION (IPM) A NOVEL SOLUTION FOR GAPFILL WITH HDP-CVD'
[patent_app_type] => utility
[patent_app_number] => 11/553772
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/553772 | Integrated process modulation (IPM) a novel solution for gapfill with HDP-CVD | Oct 26, 2006 | Issued |
Array
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[id] => 274216
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[patent_title] => 'Chemical dissolution of barrier and adhesion layers'
[patent_app_type] => utility
[patent_app_number] => 11/588982
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Array
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[id] => 7967835
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[patent_title] => 'Chip packages with covers'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/588489 | Chip packages with covers | Oct 25, 2006 | Issued |
Array
(
[id] => 4890702
[patent_doc_number] => 20080099799
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-01
[patent_title] => 'MICROPAD FOR BONDING AND A METHOD THEREFOR'
[patent_app_type] => utility
[patent_app_number] => 11/552821
[patent_app_country] => US
[patent_app_date] => 2006-10-25
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/552821 | Micropad for bonding and a method therefor | Oct 24, 2006 | Issued |
Array
(
[id] => 177851
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[patent_title] => 'Post-CMP treating liquid and manufacturing method of semiconductor device using the same'
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Array
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[id] => 5154432
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Array
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Array
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Array
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[id] => 6586893
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[patent_title] => 'COATING OPTIMIZATIOH PROCESS USING A COUPON AND COMPONENT COMPRISING A COUPON'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/312055 | Coating optimization process using a coupon and component comprising a coupon | Oct 22, 2006 | Issued |
Array
(
[id] => 4745799
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Array
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Array
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Array
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