Search

Mikado Ryan Buiz

Examiner (ID: 12419, Phone: (571)272-6578 , Office: P/3600 )

Most Active Art Unit
3506
Art Unit(s)
3731, 2899, 3506
Total Applications
2305
Issued Applications
2195
Pending Applications
18
Abandoned Applications
92

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 585250 [patent_doc_number] => 07442633 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-28 [patent_title] => 'Decoupling capacitor for high frequency noise immunity' [patent_app_type] => utility [patent_app_number] => 11/209425 [patent_app_country] => US [patent_app_date] => 2005-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 5374 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/442/07442633.pdf [firstpage_image] =>[orig_patent_app_number] => 11209425 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/209425
Decoupling capacitor for high frequency noise immunity Aug 22, 2005 Issued
Array ( [id] => 589477 [patent_doc_number] => 07435678 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'Method of depositing noble metal electrode using oxidation-reduction reaction' [patent_app_type] => utility [patent_app_number] => 11/207722 [patent_app_country] => US [patent_app_date] => 2005-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2483 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/435/07435678.pdf [firstpage_image] =>[orig_patent_app_number] => 11207722 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/207722
Method of depositing noble metal electrode using oxidation-reduction reaction Aug 21, 2005 Issued
Array ( [id] => 5057991 [patent_doc_number] => 20070060913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'Extravasation minimization device' [patent_app_type] => utility [patent_app_number] => 11/213645 [patent_app_country] => US [patent_app_date] => 2005-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2427 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20070060913.pdf [firstpage_image] =>[orig_patent_app_number] => 11213645 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/213645
Extravasation minimization device Aug 18, 2005 Issued
Array ( [id] => 803271 [patent_doc_number] => 07422975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-09-09 [patent_title] => 'Composite inter-level dielectric structure for an integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/206361 [patent_app_country] => US [patent_app_date] => 2005-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2566 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/422/07422975.pdf [firstpage_image] =>[orig_patent_app_number] => 11206361 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/206361
Composite inter-level dielectric structure for an integrated circuit Aug 17, 2005 Issued
Array ( [id] => 5608698 [patent_doc_number] => 20060270214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-30 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/205991 [patent_app_country] => US [patent_app_date] => 2005-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 9077 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0270/20060270214.pdf [firstpage_image] =>[orig_patent_app_number] => 11205991 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/205991
Semiconductor device and method for fabricating the same Aug 17, 2005 Issued
Array ( [id] => 4999875 [patent_doc_number] => 20070042509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-22 [patent_title] => 'Detecting endpoint using luminescence in the fabrication of a microelectronics device' [patent_app_type] => utility [patent_app_number] => 11/206391 [patent_app_country] => US [patent_app_date] => 2005-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3964 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20070042509.pdf [firstpage_image] =>[orig_patent_app_number] => 11206391 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/206391
Detecting endpoint using luminescence in the fabrication of a microelectronics device Aug 17, 2005 Abandoned
Array ( [id] => 5903457 [patent_doc_number] => 20060046382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Method of forming a capacitor for a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/206418 [patent_app_country] => US [patent_app_date] => 2005-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 5782 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20060046382.pdf [firstpage_image] =>[orig_patent_app_number] => 11206418 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/206418
Method of forming a capacitor for a semiconductor device Aug 16, 2005 Abandoned
Array ( [id] => 565463 [patent_doc_number] => 07465652 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-16 [patent_title] => 'Method of forming a catalyst layer on the barrier layer of a conductive interconnect of a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/204701 [patent_app_country] => US [patent_app_date] => 2005-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2765 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/465/07465652.pdf [firstpage_image] =>[orig_patent_app_number] => 11204701 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/204701
Method of forming a catalyst layer on the barrier layer of a conductive interconnect of a semiconductor device Aug 15, 2005 Issued
Array ( [id] => 373294 [patent_doc_number] => 07473597 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-06 [patent_title] => 'Method of forming via structures and method of fabricating phase change memory devices incorporating such via structures' [patent_app_type] => utility [patent_app_number] => 11/201421 [patent_app_country] => US [patent_app_date] => 2005-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6113 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 351 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/473/07473597.pdf [firstpage_image] =>[orig_patent_app_number] => 11201421 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/201421
Method of forming via structures and method of fabricating phase change memory devices incorporating such via structures Aug 10, 2005 Issued
Array ( [id] => 162295 [patent_doc_number] => 07670902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-02 [patent_title] => 'Method and structure for landing polysilicon contact' [patent_app_type] => utility [patent_app_number] => 11/190392 [patent_app_country] => US [patent_app_date] => 2005-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4317 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/670/07670902.pdf [firstpage_image] =>[orig_patent_app_number] => 11190392 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/190392
Method and structure for landing polysilicon contact Jul 25, 2005 Issued
Array ( [id] => 211401 [patent_doc_number] => 07622307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-24 [patent_title] => 'Semiconductor devices having a planarized insulating layer and methods of forming the same' [patent_app_type] => utility [patent_app_number] => 11/184701 [patent_app_country] => US [patent_app_date] => 2005-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 35 [patent_no_of_words] => 10921 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/622/07622307.pdf [firstpage_image] =>[orig_patent_app_number] => 11184701 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/184701
Semiconductor devices having a planarized insulating layer and methods of forming the same Jul 18, 2005 Issued
Array ( [id] => 7230144 [patent_doc_number] => 20050255690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-17 [patent_title] => 'Multi-step barrier deposition method' [patent_app_type] => utility [patent_app_number] => 11/184431 [patent_app_country] => US [patent_app_date] => 2005-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5653 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20050255690.pdf [firstpage_image] =>[orig_patent_app_number] => 11184431 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/184431
Multi-step barrier deposition method Jul 18, 2005 Issued
Array ( [id] => 823569 [patent_doc_number] => 07405131 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-29 [patent_title] => 'Method and structure to prevent silicide strapping of source/drain to body in semiconductor devices with source/drain stressor' [patent_app_type] => utility [patent_app_number] => 11/182681 [patent_app_country] => US [patent_app_date] => 2005-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2906 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/405/07405131.pdf [firstpage_image] =>[orig_patent_app_number] => 11182681 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/182681
Method and structure to prevent silicide strapping of source/drain to body in semiconductor devices with source/drain stressor Jul 15, 2005 Issued
Array ( [id] => 585132 [patent_doc_number] => 07442618 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-28 [patent_title] => 'Method to engineer etch profiles in Si substrate for advanced semiconductor devices' [patent_app_type] => utility [patent_app_number] => 11/182682 [patent_app_country] => US [patent_app_date] => 2005-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3703 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/442/07442618.pdf [firstpage_image] =>[orig_patent_app_number] => 11182682 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/182682
Method to engineer etch profiles in Si substrate for advanced semiconductor devices Jul 15, 2005 Issued
Array ( [id] => 7975411 [patent_doc_number] => 08070451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-06 [patent_title] => 'Modular construction for wind turbine blade' [patent_app_type] => utility [patent_app_number] => 11/632304 [patent_app_country] => US [patent_app_date] => 2005-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 2304 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/070/08070451.pdf [firstpage_image] =>[orig_patent_app_number] => 11632304 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/632304
Modular construction for wind turbine blade Jul 11, 2005 Issued
Array ( [id] => 311434 [patent_doc_number] => 07528466 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-05 [patent_title] => 'Copper gate electrode of liquid crystal display device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/178436 [patent_app_country] => US [patent_app_date] => 2005-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 13 [patent_no_of_words] => 3050 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/528/07528466.pdf [firstpage_image] =>[orig_patent_app_number] => 11178436 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/178436
Copper gate electrode of liquid crystal display device and method of fabricating the same Jul 11, 2005 Issued
Array ( [id] => 5242370 [patent_doc_number] => 20070020865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Multi-work function gates for CMOS circuit and method of manufacture' [patent_app_type] => utility [patent_app_number] => 11/175762 [patent_app_country] => US [patent_app_date] => 2005-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2390 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20070020865.pdf [firstpage_image] =>[orig_patent_app_number] => 11175762 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/175762
Method of manufacturing a multi-workfunction gates for a CMOS circuit Jul 5, 2005 Issued
Array ( [id] => 813688 [patent_doc_number] => 07413960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-19 [patent_title] => 'Method of forming floating gate electrode in flash memory device' [patent_app_type] => utility [patent_app_number] => 11/169892 [patent_app_country] => US [patent_app_date] => 2005-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2316 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/413/07413960.pdf [firstpage_image] =>[orig_patent_app_number] => 11169892 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/169892
Method of forming floating gate electrode in flash memory device Jun 29, 2005 Issued
Array ( [id] => 5793704 [patent_doc_number] => 20060014385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Method of forming titanium nitride layer and method of fabricating capacitor using the same' [patent_app_type] => utility [patent_app_number] => 11/173771 [patent_app_country] => US [patent_app_date] => 2005-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7584 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20060014385.pdf [firstpage_image] =>[orig_patent_app_number] => 11173771 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/173771
Method of forming titanium nitride layer and method of fabricating capacitor using the same Jun 29, 2005 Issued
Array ( [id] => 4663689 [patent_doc_number] => 20080254596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'Method for Transferring Wafers' [patent_app_type] => utility [patent_app_number] => 11/628615 [patent_app_country] => US [patent_app_date] => 2005-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7740 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20080254596.pdf [firstpage_image] =>[orig_patent_app_number] => 11628615 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/628615
Method for transferring wafers Jun 1, 2005 Issued
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