Search

Mikado Ryan Buiz

Examiner (ID: 12419, Phone: (571)272-6578 , Office: P/3600 )

Most Active Art Unit
3506
Art Unit(s)
3731, 2899, 3506
Total Applications
2305
Issued Applications
2195
Pending Applications
18
Abandoned Applications
92

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1037831 [patent_doc_number] => 06872983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-29 [patent_title] => 'High speed optical transceiver package using heterogeneous integration' [patent_app_type] => utility [patent_app_number] => 10/292578 [patent_app_country] => US [patent_app_date] => 2002-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 5732 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/872/06872983.pdf [firstpage_image] =>[orig_patent_app_number] => 10292578 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/292578
High speed optical transceiver package using heterogeneous integration Nov 10, 2002 Issued
Array ( [id] => 1043693 [patent_doc_number] => 06867126 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-15 [patent_title] => 'Method to increase cracking threshold for low-k materials' [patent_app_type] => utility [patent_app_number] => 10/289718 [patent_app_country] => US [patent_app_date] => 2002-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1250 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/867/06867126.pdf [firstpage_image] =>[orig_patent_app_number] => 10289718 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/289718
Method to increase cracking threshold for low-k materials Nov 6, 2002 Issued
Array ( [id] => 1196658 [patent_doc_number] => 06727146 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-27 [patent_title] => 'Semiconductor device and method of manufacturing thereof' [patent_app_type] => B2 [patent_app_number] => 10/288448 [patent_app_country] => US [patent_app_date] => 2002-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 87 [patent_no_of_words] => 15070 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/727/06727146.pdf [firstpage_image] =>[orig_patent_app_number] => 10288448 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/288448
Semiconductor device and method of manufacturing thereof Nov 5, 2002 Issued
Array ( [id] => 1141425 [patent_doc_number] => 06777288 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-17 [patent_title] => 'Vertical MOS transistor' [patent_app_type] => B1 [patent_app_number] => 10/290138 [patent_app_country] => US [patent_app_date] => 2002-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 58 [patent_no_of_words] => 5561 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/777/06777288.pdf [firstpage_image] =>[orig_patent_app_number] => 10290138 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/290138
Vertical MOS transistor Nov 5, 2002 Issued
Array ( [id] => 6770075 [patent_doc_number] => 20030216015 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => new [patent_app_number] => 10/288458 [patent_app_country] => US [patent_app_date] => 2002-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6001 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20030216015.pdf [firstpage_image] =>[orig_patent_app_number] => 10288458 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/288458
Method of manufacturing semiconductor device Nov 5, 2002 Issued
Array ( [id] => 6759924 [patent_doc_number] => 20030123285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Flash memory cell and method of manufacturing the same, and programming/erasing/reading method in the flash memory cell' [patent_app_type] => new [patent_app_number] => 10/287781 [patent_app_country] => US [patent_app_date] => 2002-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7287 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20030123285.pdf [firstpage_image] =>[orig_patent_app_number] => 10287781 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/287781
Flash memory cell and method of manufacturing the same, and programming/erasing/reading method in the flash memory cell Nov 4, 2002 Issued
Array ( [id] => 6765751 [patent_doc_number] => 20030100151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-29 [patent_title] => 'Method of manufacturing a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/287588 [patent_app_country] => US [patent_app_date] => 2002-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 26028 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20030100151.pdf [firstpage_image] =>[orig_patent_app_number] => 10287588 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/287588
Method of manufacturing a semiconductor device Nov 4, 2002 Issued
Array ( [id] => 6792175 [patent_doc_number] => 20030087519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-08 [patent_title] => 'Line configuration for bit lines for contact-connecting at least one memory cell, semiconductor component with a line configuration and method for fabricating a line configuration' [patent_app_type] => new [patent_app_number] => 10/288387 [patent_app_country] => US [patent_app_date] => 2002-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4049 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20030087519.pdf [firstpage_image] =>[orig_patent_app_number] => 10288387 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/288387
Line configuration for bit lines for contact-connecting at least one memory cell, semiconductor component with a line configuration and method for fabricating a line configuration Nov 4, 2002 Issued
Array ( [id] => 7204000 [patent_doc_number] => 20040087129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Solder bump structure and laser repair process for memory device' [patent_app_type] => new [patent_app_number] => 10/065568 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2225 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20040087129.pdf [firstpage_image] =>[orig_patent_app_number] => 10065568 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/065568
Solder bump structure and laser repair process for memory device Oct 30, 2002 Issued
Array ( [id] => 1196651 [patent_doc_number] => 06727142 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-27 [patent_title] => 'Orientation independent oxidation of nitrided silicon' [patent_app_type] => B1 [patent_app_number] => 10/284508 [patent_app_country] => US [patent_app_date] => 2002-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2696 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/727/06727142.pdf [firstpage_image] =>[orig_patent_app_number] => 10284508 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/284508
Orientation independent oxidation of nitrided silicon Oct 28, 2002 Issued
Array ( [id] => 7383674 [patent_doc_number] => 20040082194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-29 [patent_title] => 'METHOD FOR COATING A THICK SPIN-ON-GLASS LAYER ON A SEMICONDUCTOR STRUCTURE' [patent_app_type] => new [patent_app_number] => 10/283588 [patent_app_country] => US [patent_app_date] => 2002-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2773 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20040082194.pdf [firstpage_image] =>[orig_patent_app_number] => 10283588 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/283588
Method for coating a thick spin-on-glass layer on a semiconductor structure Oct 28, 2002 Issued
Array ( [id] => 1297360 [patent_doc_number] => 06627502 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-30 [patent_title] => 'Method for forming high concentration shallow junctions for short channel MOSFETs' [patent_app_type] => B1 [patent_app_number] => 10/279898 [patent_app_country] => US [patent_app_date] => 2002-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 5819 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/627/06627502.pdf [firstpage_image] =>[orig_patent_app_number] => 10279898 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/279898
Method for forming high concentration shallow junctions for short channel MOSFETs Oct 23, 2002 Issued
Array ( [id] => 1073660 [patent_doc_number] => 06838325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-04 [patent_title] => 'Method of forming a self-aligned, selectively etched, double recess high electron mobility transistor' [patent_app_type] => utility [patent_app_number] => 10/279358 [patent_app_country] => US [patent_app_date] => 2002-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2940 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/838/06838325.pdf [firstpage_image] =>[orig_patent_app_number] => 10279358 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/279358
Method of forming a self-aligned, selectively etched, double recess high electron mobility transistor Oct 23, 2002 Issued
Array ( [id] => 6692471 [patent_doc_number] => 20030039903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-27 [patent_title] => 'Semiconductor structure, capacitor, mask and methods of manufacture thereof' [patent_app_type] => new [patent_app_number] => 10/278324 [patent_app_country] => US [patent_app_date] => 2002-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3359 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20030039903.pdf [firstpage_image] =>[orig_patent_app_number] => 10278324 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/278324
Semiconductor structure, capacitor, mask and methods of manufacture thereof Oct 22, 2002 Issued
Array ( [id] => 1299986 [patent_doc_number] => 06627933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-30 [patent_title] => 'Method of forming minimally spaced word lines' [patent_app_type] => B2 [patent_app_number] => 10/277938 [patent_app_country] => US [patent_app_date] => 2002-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 29 [patent_no_of_words] => 5271 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/627/06627933.pdf [firstpage_image] =>[orig_patent_app_number] => 10277938 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/277938
Method of forming minimally spaced word lines Oct 22, 2002 Issued
Array ( [id] => 1220516 [patent_doc_number] => 06703281 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-09 [patent_title] => 'Differential laser thermal process with disposable spacers' [patent_app_type] => B1 [patent_app_number] => 10/274038 [patent_app_country] => US [patent_app_date] => 2002-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2166 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/703/06703281.pdf [firstpage_image] =>[orig_patent_app_number] => 10274038 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/274038
Differential laser thermal process with disposable spacers Oct 20, 2002 Issued
Array ( [id] => 6843273 [patent_doc_number] => 20030148620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Process for a monolithically-integrated micromachined sensor and circuit' [patent_app_type] => new [patent_app_number] => 10/065448 [patent_app_country] => US [patent_app_date] => 2002-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4318 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20030148620.pdf [firstpage_image] =>[orig_patent_app_number] => 10065448 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/065448
Process for a monolithically-integrated micromachined sensor and circuit Oct 17, 2002 Issued
Array ( [id] => 1273745 [patent_doc_number] => 06649456 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-18 [patent_title] => 'SRAM cell design for soft error rate immunity' [patent_app_type] => B1 [patent_app_number] => 10/272081 [patent_app_country] => US [patent_app_date] => 2002-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4252 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/649/06649456.pdf [firstpage_image] =>[orig_patent_app_number] => 10272081 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/272081
SRAM cell design for soft error rate immunity Oct 15, 2002 Issued
Array ( [id] => 1297408 [patent_doc_number] => 06627513 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-30 [patent_title] => 'Method of measuring resistance in deep trench' [patent_app_type] => B1 [patent_app_number] => 10/271598 [patent_app_country] => US [patent_app_date] => 2002-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 1815 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/627/06627513.pdf [firstpage_image] =>[orig_patent_app_number] => 10271598 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/271598
Method of measuring resistance in deep trench Oct 14, 2002 Issued
Array ( [id] => 1285417 [patent_doc_number] => 06638873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-28 [patent_title] => 'Semiconductor device producing method' [patent_app_type] => B2 [patent_app_number] => 10/270078 [patent_app_country] => US [patent_app_date] => 2002-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 8641 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/638/06638873.pdf [firstpage_image] =>[orig_patent_app_number] => 10270078 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/270078
Semiconductor device producing method Oct 14, 2002 Issued
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