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Min Huang

Examiner (ID: 3981)

Most Active Art Unit
2827
Art Unit(s)
2827
Total Applications
991
Issued Applications
867
Pending Applications
55
Abandoned Applications
85

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18346865 [patent_doc_number] => 20230134975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/684951 [patent_app_country] => US [patent_app_date] => 2022-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7246 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17684951 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/684951
Memory device Mar 1, 2022 Issued
Array ( [id] => 17900492 [patent_doc_number] => 20220310154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => MEMORY DEVICE TRANSMITTING AND RECEIVING DATA AT HIGH SPEED AND LOW POWER [patent_app_type] => utility [patent_app_number] => 17/685067 [patent_app_country] => US [patent_app_date] => 2022-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18975 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17685067 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/685067
Memory device transmitting and receiving data at high speed and low power Mar 1, 2022 Issued
Array ( [id] => 17854903 [patent_doc_number] => 20220284946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => DRAM DEVICE AND ODT RESISTOR VALUE ADJUSTMENT METHOD AND COMPUTER PROGRAM FOR THE SAME [patent_app_type] => utility [patent_app_number] => 17/678500 [patent_app_country] => US [patent_app_date] => 2022-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3021 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17678500 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/678500
DRAM device and ODT resistor value adjustment method and computer program for the same Feb 22, 2022 Issued
Array ( [id] => 20189578 [patent_doc_number] => 12400700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Memory device provided with dram memory circuits arranged in such a way as to minimize the size of a memory block allowing management of the row-hammering [patent_app_type] => utility [patent_app_number] => 18/277961 [patent_app_country] => US [patent_app_date] => 2022-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18277961 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/277961
Memory device provided with dram memory circuits arranged in such a way as to minimize the size of a memory block allowing management of the row-hammering Feb 10, 2022 Issued
Array ( [id] => 18179081 [patent_doc_number] => 20230039810 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => REFRESH COUNTER CIRCUIT, REFRESH COUNTING METHOD AND SEMICONDUCTOR MEMORY [patent_app_type] => utility [patent_app_number] => 17/669585 [patent_app_country] => US [patent_app_date] => 2022-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6309 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17669585 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/669585
Refresh counter circuit, refresh counting method and semiconductor memory Feb 10, 2022 Issued
Array ( [id] => 20189578 [patent_doc_number] => 12400700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Memory device provided with dram memory circuits arranged in such a way as to minimize the size of a memory block allowing management of the row-hammering [patent_app_type] => utility [patent_app_number] => 18/277961 [patent_app_country] => US [patent_app_date] => 2022-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18277961 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/277961
Memory device provided with dram memory circuits arranged in such a way as to minimize the size of a memory block allowing management of the row-hammering Feb 10, 2022 Issued
Array ( [id] => 18237856 [patent_doc_number] => 20230070166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD OF THE SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/665300 [patent_app_country] => US [patent_app_date] => 2022-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20777 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17665300 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/665300
Semiconductor memory device and operating method of the semiconductor memory device Feb 3, 2022 Issued
Array ( [id] => 18874415 [patent_doc_number] => 11862236 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-01-02 [patent_title] => Memory component for deployment in a dynamic stripe width memory system [patent_app_type] => utility [patent_app_number] => 17/588561 [patent_app_country] => US [patent_app_date] => 2022-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 10066 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17588561 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/588561
Memory component for deployment in a dynamic stripe width memory system Jan 30, 2022 Issued
Array ( [id] => 19444260 [patent_doc_number] => 12094546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Non-volatile memory with zone based program speed adjustment [patent_app_type] => utility [patent_app_number] => 17/589789 [patent_app_country] => US [patent_app_date] => 2022-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 34 [patent_no_of_words] => 21921 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 336 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17589789 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/589789
Non-volatile memory with zone based program speed adjustment Jan 30, 2022 Issued
Array ( [id] => 18539304 [patent_doc_number] => 20230244412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => ENCODING AND INTEGRITY MARKERS FOR MOLECULAR STORAGE APPLICATIONS [patent_app_type] => utility [patent_app_number] => 17/649291 [patent_app_country] => US [patent_app_date] => 2022-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5366 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17649291 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/649291
Encoding and integrity markers for molecular storage applications Jan 27, 2022 Issued
Array ( [id] => 17765182 [patent_doc_number] => 20220238796 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => MAGNETIC MEMORY DEVICE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/580971 [patent_app_country] => US [patent_app_date] => 2022-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10914 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17580971 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/580971
Magnetic memory device and operation method thereof Jan 20, 2022 Issued
Array ( [id] => 18124416 [patent_doc_number] => 20230010028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => NON-VOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/574657 [patent_app_country] => US [patent_app_date] => 2022-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17574657 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/574657
Non-volatile memory device Jan 12, 2022 Issued
Array ( [id] => 18067965 [patent_doc_number] => 20220399053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-15 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING LOAD OF GLOBAL INPUT-OUTPUT LINES OF THE SAME [patent_app_type] => utility [patent_app_number] => 17/574655 [patent_app_country] => US [patent_app_date] => 2022-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11603 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17574655 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/574655
Semiconductor memory device and method of controlling load of global input-output lines of the same Jan 12, 2022 Issued
Array ( [id] => 19093703 [patent_doc_number] => 11955167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Computing-in-memory accelerator design with dynamic analog RAM cell and associated low power techniques with sparsity management [patent_app_type] => utility [patent_app_number] => 17/574363 [patent_app_country] => US [patent_app_date] => 2022-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 3121 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17574363 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/574363
Computing-in-memory accelerator design with dynamic analog RAM cell and associated low power techniques with sparsity management Jan 11, 2022 Issued
Array ( [id] => 17949015 [patent_doc_number] => 20220336034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING ABNORMALITY DETECTION CIRCUIT AND SEMICONDUCTOR DEVICE CONTROL METHOD FOR DETECTING ABNORMALITY [patent_app_type] => utility [patent_app_number] => 17/573310 [patent_app_country] => US [patent_app_date] => 2022-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10504 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17573310 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/573310
Semiconductor device including abnormality detection circuit and semiconductor device control method for detecting abnormality Jan 10, 2022 Issued
Array ( [id] => 18500301 [patent_doc_number] => 20230223086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => VOLTAGE KICK FOR IMPROVED ERASE EFFICIENCY IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/572292 [patent_app_country] => US [patent_app_date] => 2022-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11358 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17572292 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/572292
Voltage kick for improved erase efficiency in a memory device Jan 9, 2022 Issued
Array ( [id] => 17900480 [patent_doc_number] => 20220310142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => SENSE AMPLIFIER, MEMORY AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 17/647552 [patent_app_country] => US [patent_app_date] => 2022-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10892 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17647552 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/647552
Sense amplifier, memory and control method Jan 9, 2022 Issued
Array ( [id] => 17566295 [patent_doc_number] => 20220130444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => WRITE OPERATION TECHNIQUES FOR MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/569295 [patent_app_country] => US [patent_app_date] => 2022-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19905 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17569295 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/569295
Write operation techniques for memory systems Jan 4, 2022 Issued
Array ( [id] => 18211904 [patent_doc_number] => 20230058168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/566306 [patent_app_country] => US [patent_app_date] => 2021-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7094 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17566306 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/566306
Semiconductor memory device and operating method thereof Dec 29, 2021 Issued
Array ( [id] => 18983326 [patent_doc_number] => 11908511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/645814 [patent_app_country] => US [patent_app_date] => 2021-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 30 [patent_no_of_words] => 13929 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17645814 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/645814
Semiconductor memory device Dec 22, 2021 Issued
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