Search

Min Huang

Examiner (ID: 3981)

Most Active Art Unit
2827
Art Unit(s)
2827
Total Applications
991
Issued Applications
867
Pending Applications
55
Abandoned Applications
85

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17716409 [patent_doc_number] => 11380407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Memory system and method for measuring capacitance value [patent_app_type] => utility [patent_app_number] => 17/185434 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 6855 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17185434 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/185434
Memory system and method for measuring capacitance value Feb 24, 2021 Issued
Array ( [id] => 17878362 [patent_doc_number] => 11450383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Semiconductor storage device [patent_app_type] => utility [patent_app_number] => 17/183933 [patent_app_country] => US [patent_app_date] => 2021-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13953 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17183933 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/183933
Semiconductor storage device Feb 23, 2021 Issued
Array ( [id] => 16873303 [patent_doc_number] => 20210166770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => PEAK CURRENT MANAGEMENT IN A MEMORY ARRAY [patent_app_type] => utility [patent_app_number] => 17/176009 [patent_app_country] => US [patent_app_date] => 2021-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11129 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17176009 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/176009
Peak current management in a memory array Feb 14, 2021 Issued
Array ( [id] => 17716396 [patent_doc_number] => 11380394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Voltage profile for reduction of read disturb in memory cells [patent_app_type] => utility [patent_app_number] => 17/158984 [patent_app_country] => US [patent_app_date] => 2021-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4737 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17158984 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/158984
Voltage profile for reduction of read disturb in memory cells Jan 25, 2021 Issued
Array ( [id] => 17744259 [patent_doc_number] => 11392326 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-19 [patent_title] => Memory device and method of operating the memory device [patent_app_type] => utility [patent_app_number] => 17/156128 [patent_app_country] => US [patent_app_date] => 2021-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11309 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17156128 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/156128
Memory device and method of operating the memory device Jan 21, 2021 Issued
Array ( [id] => 19007380 [patent_doc_number] => 20240071451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => THREE-STATE SPINTRONIC DEVICE, MEMORY CELL, MEMORY ARRAY AND READ-WRITE CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/261716 [patent_app_country] => US [patent_app_date] => 2021-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18261716 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/261716
Three-state spintronic device, memory cell, memory array and read-write circuit Jan 20, 2021 Issued
Array ( [id] => 18668301 [patent_doc_number] => 11775199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Voltage resonance mitigation of memory dies [patent_app_type] => utility [patent_app_number] => 17/153519 [patent_app_country] => US [patent_app_date] => 2021-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9647 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17153519 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/153519
Voltage resonance mitigation of memory dies Jan 19, 2021 Issued
Array ( [id] => 16811798 [patent_doc_number] => 20210134353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => NONVOLATILE MEMORY STRUCTURES WITH DRAM [patent_app_type] => utility [patent_app_number] => 17/144340 [patent_app_country] => US [patent_app_date] => 2021-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17144340 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/144340
Nonvolatile memory structures with DRAM Jan 7, 2021 Issued
Array ( [id] => 16794695 [patent_doc_number] => 20210124512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => RECONFIGURABLE MEMORY ARCHITECTURES [patent_app_type] => utility [patent_app_number] => 17/142837 [patent_app_country] => US [patent_app_date] => 2021-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20752 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17142837 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/142837
Reconfigurable memory architectures Jan 5, 2021 Issued
Array ( [id] => 17787584 [patent_doc_number] => 11410718 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Systems and methods for common gate input buffers [patent_app_type] => utility [patent_app_number] => 17/139260 [patent_app_country] => US [patent_app_date] => 2020-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6254 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17139260 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/139260
Systems and methods for common gate input buffers Dec 30, 2020 Issued
Array ( [id] => 17787583 [patent_doc_number] => 11410717 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Apparatuses and methods for in-memory operations [patent_app_type] => utility [patent_app_number] => 17/135865 [patent_app_country] => US [patent_app_date] => 2020-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 30324 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17135865 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/135865
Apparatuses and methods for in-memory operations Dec 27, 2020 Issued
Array ( [id] => 17516664 [patent_doc_number] => 11295824 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-05 [patent_title] => Memory controller and storage device including the same [patent_app_type] => utility [patent_app_number] => 17/132098 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 7067 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17132098 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/132098
Memory controller and storage device including the same Dec 22, 2020 Issued
Array ( [id] => 17908403 [patent_doc_number] => 11462263 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Burst-mode memory with column multiplexer [patent_app_type] => utility [patent_app_number] => 17/131172 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8249 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17131172 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/131172
Burst-mode memory with column multiplexer Dec 21, 2020 Issued
Array ( [id] => 16730913 [patent_doc_number] => 20210098061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => COMPARING INPUT DATA TO STORED DATA [patent_app_type] => utility [patent_app_number] => 17/118102 [patent_app_country] => US [patent_app_date] => 2020-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20188 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17118102 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/118102
Comparing input data to stored data Dec 9, 2020 Issued
Array ( [id] => 16730911 [patent_doc_number] => 20210098059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => PRECISE WRITING OF MULTI-LEVEL WEIGHTS TO MEMORY DEVICES FOR COMPUTE-IN-MEMORY [patent_app_type] => utility [patent_app_number] => 17/117795 [patent_app_country] => US [patent_app_date] => 2020-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9237 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17117795 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/117795
Precise writing of multi-level weights to memory devices for compute-in-memory Dec 9, 2020 Issued
Array ( [id] => 17660483 [patent_doc_number] => 20220180948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => TEMPERATURE COMPENSATION FOR UNSELECTED SUB-BLOCK INHIBIT BIAS FOR MITIGATING ERASE DISTURB [patent_app_type] => utility [patent_app_number] => 17/113920 [patent_app_country] => US [patent_app_date] => 2020-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13997 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17113920 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/113920
Temperature compensation for unselected sub-block inhibit bias for mitigating erase disturb Dec 6, 2020 Issued
Array ( [id] => 17878380 [patent_doc_number] => 11450401 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Method, system and computer program product for memory repair [patent_app_type] => utility [patent_app_number] => 17/108870 [patent_app_country] => US [patent_app_date] => 2020-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 15176 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17108870 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/108870
Method, system and computer program product for memory repair Nov 30, 2020 Issued
Array ( [id] => 18292153 [patent_doc_number] => 11621026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Write driver with magnetic field compensation [patent_app_type] => utility [patent_app_number] => 17/108411 [patent_app_country] => US [patent_app_date] => 2020-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7632 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17108411 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/108411
Write driver with magnetic field compensation Nov 30, 2020 Issued
Array ( [id] => 17682255 [patent_doc_number] => 11366507 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-21 [patent_title] => Storage device, semiconductor device, electronic component, and electronic device [patent_app_type] => utility [patent_app_number] => 17/104460 [patent_app_country] => US [patent_app_date] => 2020-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 42 [patent_no_of_words] => 15240 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17104460 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/104460
Storage device, semiconductor device, electronic component, and electronic device Nov 24, 2020 Issued
Array ( [id] => 16715380 [patent_doc_number] => 20210082527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => MEMORIES HAVING MULTIPLE VOLTAGE GENERATION SYSTEMS CONNECTED TO A VOLTAGE REGULATOR [patent_app_type] => utility [patent_app_number] => 17/102602 [patent_app_country] => US [patent_app_date] => 2020-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12908 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17102602 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/102602
Memories having multiple voltage generation systems connected to a voltage regulator Nov 23, 2020 Issued
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