Search

Min Huang

Examiner (ID: 3981)

Most Active Art Unit
2827
Art Unit(s)
2827
Total Applications
991
Issued Applications
867
Pending Applications
55
Abandoned Applications
85

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16677024 [patent_doc_number] => 20210065790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => ADAPTIVE APPLICATION OF VOLTAGE PULSES TO STABILIZE MEMORY CELL VOLTAGE LEVELS [patent_app_type] => utility [patent_app_number] => 16/551104 [patent_app_country] => US [patent_app_date] => 2019-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9810 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16551104 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/551104
Adaptive application of voltage pulses to stabilize memory cell voltage levels Aug 25, 2019 Issued
Array ( [id] => 17978764 [patent_doc_number] => 11495638 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-08 [patent_title] => Crossbar array circuits with 2T1R RRAM cells for low voltage operations [patent_app_type] => utility [patent_app_number] => 16/550258 [patent_app_country] => US [patent_app_date] => 2019-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 4289 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16550258 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/550258
Crossbar array circuits with 2T1R RRAM cells for low voltage operations Aug 24, 2019 Issued
Array ( [id] => 15442217 [patent_doc_number] => 20200035292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => SENSE AMPLIFIER WITH LOWER OFFSET AND INCREASED SPEED [patent_app_type] => utility [patent_app_number] => 16/536206 [patent_app_country] => US [patent_app_date] => 2019-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24992 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16536206 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/536206
Sense amplifier with lower offset and increased speed Aug 7, 2019 Issued
Array ( [id] => 16818557 [patent_doc_number] => 11003383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Estimation of read level thresholds using a data structure [patent_app_type] => utility [patent_app_number] => 16/514588 [patent_app_country] => US [patent_app_date] => 2019-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 14136 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16514588 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/514588
Estimation of read level thresholds using a data structure Jul 16, 2019 Issued
Array ( [id] => 15092601 [patent_doc_number] => 20190341112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => OPERATIONS ON MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 16/511727 [patent_app_country] => US [patent_app_date] => 2019-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20198 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16511727 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/511727
Operations on memory cells Jul 14, 2019 Issued
Array ( [id] => 15045145 [patent_doc_number] => 20190333577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => COMPARING INPUT DATA TO STORED DATA [patent_app_type] => utility [patent_app_number] => 16/510035 [patent_app_country] => US [patent_app_date] => 2019-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20151 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16510035 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/510035
Comparing input data to stored data Jul 11, 2019 Issued
Array ( [id] => 16894881 [patent_doc_number] => 11036432 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Low power mode for a memory device [patent_app_type] => utility [patent_app_number] => 16/506714 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 15424 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506714 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506714
Low power mode for a memory device Jul 8, 2019 Issued
Array ( [id] => 16943920 [patent_doc_number] => 11056168 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Temperature compensated memory refresh [patent_app_type] => utility [patent_app_number] => 16/506118 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3778 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506118 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506118
Temperature compensated memory refresh Jul 8, 2019 Issued
Array ( [id] => 15597077 [patent_doc_number] => 20200075073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => SPIN CURRENT MAGNETIZATION ROTATIONAL MAGNETIC ELEMENT, SPIN CURRENT MAGNETIZATION ROTATIONAL MAGNETORESISTANCE EFFECT ELEMENT, AND MAGNETIC MEMORY [patent_app_type] => utility [patent_app_number] => 16/506270 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8056 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506270 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506270
Spin current magnetization rotational magnetic element, spin current magnetization rotational magnetoresistance effect element, and magnetic memory Jul 8, 2019 Issued
Array ( [id] => 16000329 [patent_doc_number] => 20200176035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/506648 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17566 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506648 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506648
Semiconductor devices Jul 8, 2019 Issued
Array ( [id] => 16957717 [patent_doc_number] => 11061577 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-13 [patent_title] => System on chip performing training of duty cycle of write clock using mode register write command, operating method of system on chip, electronic device including system on chip [patent_app_type] => utility [patent_app_number] => 16/460291 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9063 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16460291 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/460291
System on chip performing training of duty cycle of write clock using mode register write command, operating method of system on chip, electronic device including system on chip Jul 1, 2019 Issued
Array ( [id] => 17173836 [patent_doc_number] => 20210327507 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => METHOD OF SEARCHING THROUGH TERNARY CONTENT ADDRESSABLE MEMORY (TCAM) AND SYSTEM THEREOF [patent_app_type] => utility [patent_app_number] => 17/269880 [patent_app_country] => US [patent_app_date] => 2019-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3054 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17269880 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/269880
Method of searching through ternary content addressable memory (TCAM) and system thereof Jun 30, 2019 Issued
Array ( [id] => 15532091 [patent_doc_number] => 20200058351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-20 [patent_title] => SEMICONDUCTOR MEMORY APPARATUS, SEMICONDUCTOR SYSTEM AND ELECTRONIC DEVICE INCLUDING THE SEMICONDUCTOR MEMORY APPARATUS [patent_app_type] => utility [patent_app_number] => 16/454222 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7219 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16454222 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/454222
Semiconductor memory apparatus, semiconductor system and electronic device including the semiconductor memory apparatus Jun 26, 2019 Issued
Array ( [id] => 16447984 [patent_doc_number] => 10839915 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-17 [patent_title] => Bitline boost for nonvolatile memory [patent_app_type] => utility [patent_app_number] => 16/454468 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 14433 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16454468 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/454468
Bitline boost for nonvolatile memory Jun 26, 2019 Issued
Array ( [id] => 16423687 [patent_doc_number] => 20200348885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => ELECTRONIC APPARATUS AND METHOD OF MANAGING READ LEVELS OF FLASH MEMORY [patent_app_type] => utility [patent_app_number] => 16/438386 [patent_app_country] => US [patent_app_date] => 2019-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3323 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16438386 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/438386
Electronic apparatus and method of managing read levels of flash memory Jun 10, 2019 Issued
Array ( [id] => 16591634 [patent_doc_number] => 10900890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Method and device for evaluating the quality of a component produced by means of an additive laser sintering and/or laser melting method [patent_app_type] => utility [patent_app_number] => 16/436456 [patent_app_country] => US [patent_app_date] => 2019-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4002 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16436456 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/436456
Method and device for evaluating the quality of a component produced by means of an additive laser sintering and/or laser melting method Jun 9, 2019 Issued
Array ( [id] => 17573949 [patent_doc_number] => 11322223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => JTAG based architecture allowing multi-core operation [patent_app_type] => utility [patent_app_number] => 16/625455 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 11197 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16625455 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/625455
JTAG based architecture allowing multi-core operation May 30, 2019 Issued
Array ( [id] => 17543917 [patent_doc_number] => 11309049 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Direct memory access using JTAG cell addressing [patent_app_type] => utility [patent_app_number] => 16/624665 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7223 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16624665 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/624665
Direct memory access using JTAG cell addressing May 30, 2019 Issued
Array ( [id] => 17032540 [patent_doc_number] => 11094357 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => Memory devices with user-defined tagging mechanism [patent_app_type] => utility [patent_app_number] => 16/405072 [patent_app_country] => US [patent_app_date] => 2019-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6559 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16405072 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/405072
Memory devices with user-defined tagging mechanism May 6, 2019 Issued
Array ( [id] => 16566624 [patent_doc_number] => 10891998 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Memory device operating based on a write current for a given operation condition and a method of driving the write current [patent_app_type] => utility [patent_app_number] => 16/401236 [patent_app_country] => US [patent_app_date] => 2019-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 11161 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16401236 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/401236
Memory device operating based on a write current for a given operation condition and a method of driving the write current May 1, 2019 Issued
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