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Min Huang

Examiner (ID: 3981)

Most Active Art Unit
2827
Art Unit(s)
2827
Total Applications
991
Issued Applications
867
Pending Applications
55
Abandoned Applications
85

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16424828 [patent_doc_number] => 20200350026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => PEAK CURRENT MANAGEMENT IN A MEMORY ARRAY [patent_app_type] => utility [patent_app_number] => 16/400398 [patent_app_country] => US [patent_app_date] => 2019-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11102 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16400398 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/400398
Peak current management in a memory array Apr 30, 2019 Issued
Array ( [id] => 15938525 [patent_doc_number] => 20200160896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/400680 [patent_app_country] => US [patent_app_date] => 2019-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24510 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16400680 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/400680
Semiconductor devices Apr 30, 2019 Issued
Array ( [id] => 15806933 [patent_doc_number] => 20200126609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => MEMORY MODULES, MEMORY SYSTEMS, AND METHODS OF OPERATING MEMORY MODULES [patent_app_type] => utility [patent_app_number] => 16/390460 [patent_app_country] => US [patent_app_date] => 2019-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8432 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16390460 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/390460
Memory modules, memory systems, and methods of operating memory modules Apr 21, 2019 Issued
Array ( [id] => 16818563 [patent_doc_number] => 11003389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Memory device including memory chips and operation method thereof [patent_app_type] => utility [patent_app_number] => 16/384702 [patent_app_country] => US [patent_app_date] => 2019-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7727 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16384702 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/384702
Memory device including memory chips and operation method thereof Apr 14, 2019 Issued
Array ( [id] => 16372178 [patent_doc_number] => 10803944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Architecture for 3-D NAND memory [patent_app_type] => utility [patent_app_number] => 16/378090 [patent_app_country] => US [patent_app_date] => 2019-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 8877 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16378090 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/378090
Architecture for 3-D NAND memory Apr 7, 2019 Issued
Array ( [id] => 16819680 [patent_doc_number] => 11004517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Storage device including nonvolatile memory device and operating method thereof [patent_app_type] => utility [patent_app_number] => 16/356182 [patent_app_country] => US [patent_app_date] => 2019-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11837 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16356182 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/356182
Storage device including nonvolatile memory device and operating method thereof Mar 17, 2019 Issued
Array ( [id] => 16249254 [patent_doc_number] => 10748628 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Read level tracking and optimization [patent_app_type] => utility [patent_app_number] => 16/354039 [patent_app_country] => US [patent_app_date] => 2019-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12332 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16354039 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/354039
Read level tracking and optimization Mar 13, 2019 Issued
Array ( [id] => 14784407 [patent_doc_number] => 20190267101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => SERIAL INTERFACE CIRCUIT, SEMICONDUCTOR DEVICE AND SERIAL-PARALLEL CONVERSION METHOD [patent_app_type] => utility [patent_app_number] => 16/283848 [patent_app_country] => US [patent_app_date] => 2019-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7680 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16283848 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/283848
Serial interface circuit, semiconductor device and serial-parallel conversion method Feb 24, 2019 Issued
Array ( [id] => 16210521 [patent_doc_number] => 20200243511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => HIGH VOLTAGE PROTECTION FOR HIGH-SPEED DATA INTERFACE [patent_app_type] => utility [patent_app_number] => 16/256945 [patent_app_country] => US [patent_app_date] => 2019-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6573 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16256945 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/256945
High voltage protection for high-speed data interface Jan 23, 2019 Issued
Array ( [id] => 14284647 [patent_doc_number] => 20190139608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/242489 [patent_app_country] => US [patent_app_date] => 2019-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23089 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16242489 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/242489
Semiconductor memory device Jan 7, 2019 Issued
Array ( [id] => 14221347 [patent_doc_number] => 20190123058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-25 [patent_title] => MEMORY DEVICE INCLUDING PASS TRANSISTORS IN MEMORY TIERS [patent_app_type] => utility [patent_app_number] => 16/228574 [patent_app_country] => US [patent_app_date] => 2018-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15803 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16228574 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/228574
Memory device including pass transistors in memory tiers Dec 19, 2018 Issued
Array ( [id] => 16873292 [patent_doc_number] => 20210166759 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => SEMICONDUCTOR CIRCUIT AND SEMICONDUCTOR CIRCUIT SYSTEM [patent_app_type] => utility [patent_app_number] => 16/768879 [patent_app_country] => US [patent_app_date] => 2018-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22465 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 354 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16768879 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/768879
Semiconductor circuit and semiconductor circuit system Dec 3, 2018 Issued
Array ( [id] => 14135171 [patent_doc_number] => 20190101975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-04 [patent_title] => SYSTEMS AND METHODS FOR FREQUENCY MODE DETECTION AND IMPLEMENTATION [patent_app_type] => utility [patent_app_number] => 16/205356 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4986 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16205356 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/205356
Systems and methods for frequency mode detection and implementation Nov 29, 2018 Issued
Array ( [id] => 16323985 [patent_doc_number] => 10783955 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-22 [patent_title] => Memory circuit having shared word line [patent_app_type] => utility [patent_app_number] => 16/207030 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7565 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16207030 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/207030
Memory circuit having shared word line Nov 29, 2018 Issued
Array ( [id] => 14190705 [patent_doc_number] => 20190115058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => APPARATUS AND METHOD OF CLOCK SHAPING FOR MEMORY [patent_app_type] => utility [patent_app_number] => 16/206998 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4800 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16206998 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/206998
Apparatus and method of clock shaping for memory Nov 29, 2018 Issued
Array ( [id] => 15745833 [patent_doc_number] => 20200111806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => METHODS FOR FORMING THREE-DIMENSIONAL MEMORY DEVICE HAVING CHANNEL STRUCTURES WITH NATIVE OXIDE LAYER [patent_app_type] => utility [patent_app_number] => 16/194310 [patent_app_country] => US [patent_app_date] => 2018-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9175 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16194310 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/194310
Methods for forming three-dimensional memory device having channel structures with native oxide layer Nov 16, 2018 Issued
Array ( [id] => 16285990 [patent_doc_number] => 20200279592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-03 [patent_title] => DATA ACQUISITION METHOD AND DATA ACQUISITION APPARATUS [patent_app_type] => utility [patent_app_number] => 16/645503 [patent_app_country] => US [patent_app_date] => 2018-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3112 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16645503 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/645503
Data acquisition method and data acquisition apparatus Oct 9, 2018 Issued
Array ( [id] => 13878245 [patent_doc_number] => 20190035463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => DOUBLE BIAS MEMRISTIVE DOT PRODUCT ENGINE FOR VECTOR PROCESSING [patent_app_type] => utility [patent_app_number] => 16/148468 [patent_app_country] => US [patent_app_date] => 2018-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7109 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16148468 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/148468
Double bias memristive dot product engine for vector processing Sep 30, 2018 Issued
Array ( [id] => 14109661 [patent_doc_number] => 20190096506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => Data Storage Device with Rewritable In-Place Memory [patent_app_type] => utility [patent_app_number] => 16/148409 [patent_app_country] => US [patent_app_date] => 2018-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6636 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16148409 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/148409
Data storage device with rewriteable in-place memory Sep 30, 2018 Issued
Array ( [id] => 15822619 [patent_doc_number] => 10636503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-28 [patent_title] => Alteration of sensing time in memory cells [patent_app_type] => utility [patent_app_number] => 16/145012 [patent_app_country] => US [patent_app_date] => 2018-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 25 [patent_no_of_words] => 12475 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16145012 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/145012
Alteration of sensing time in memory cells Sep 26, 2018 Issued
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