
Min Huang
Examiner (ID: 3981)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2827 |
| Total Applications | 991 |
| Issued Applications | 867 |
| Pending Applications | 55 |
| Abandoned Applications | 85 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19294329
[patent_doc_number] => 12033690
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-09
[patent_title] => Sense amplifier, memory and control method
[patent_app_type] => utility
[patent_app_number] => 17/842161
[patent_app_country] => US
[patent_app_date] => 2022-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 7233
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17842161
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/842161 | Sense amplifier, memory and control method | Jun 15, 2022 | Issued |
Array
(
[id] => 17900485
[patent_doc_number] => 20220310147
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-29
[patent_title] => TRANSITION METAL DICHALCOGENIDE BASED SPIN ORBIT TORQUE MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/839345
[patent_app_country] => US
[patent_app_date] => 2022-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11110
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17839345
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/839345 | Transition metal dichalcogenide based spin orbit torque memory device | Jun 12, 2022 | Issued |
Array
(
[id] => 18812187
[patent_doc_number] => 20230386524
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-30
[patent_title] => VOLTAGE REGULATOR FOR PROVIDING WORD LINE VOLTAGE
[patent_app_type] => utility
[patent_app_number] => 17/829350
[patent_app_country] => US
[patent_app_date] => 2022-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4455
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17829350
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/829350 | Voltage regulator for providing word line voltage | May 30, 2022 | Issued |
Array
(
[id] => 18812221
[patent_doc_number] => 20230386558
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-30
[patent_title] => MEMORY DEVICE HAVING PROTRUSION OF WORD LINE
[patent_app_type] => utility
[patent_app_number] => 17/824011
[patent_app_country] => US
[patent_app_date] => 2022-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8542
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17824011
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/824011 | Memory device having protrusion of word line | May 24, 2022 | Issued |
Array
(
[id] => 19093731
[patent_doc_number] => 11955195
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-09
[patent_title] => Semiconductor memory device with defect detection capability
[patent_app_type] => utility
[patent_app_number] => 17/748441
[patent_app_country] => US
[patent_app_date] => 2022-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 58
[patent_figures_cnt] => 62
[patent_no_of_words] => 14386
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17748441
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/748441 | Semiconductor memory device with defect detection capability | May 18, 2022 | Issued |
Array
(
[id] => 18874412
[patent_doc_number] => 11862233
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-02
[patent_title] => System and method for detecting mismatch of sense amplifier
[patent_app_type] => utility
[patent_app_number] => 17/664058
[patent_app_country] => US
[patent_app_date] => 2022-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 7345
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17664058
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/664058 | System and method for detecting mismatch of sense amplifier | May 18, 2022 | Issued |
Array
(
[id] => 17840490
[patent_doc_number] => 20220277796
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-01
[patent_title] => HYBRID ROUTINE FOR A MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/747516
[patent_app_country] => US
[patent_app_date] => 2022-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16124
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17747516
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/747516 | Hybrid routine for a memory device | May 17, 2022 | Issued |
Array
(
[id] => 18243648
[patent_doc_number] => 20230075959
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-09
[patent_title] => SRAM DESIGN FOR ENERGY EFFICIENT SEQUENTIAL ACCESS
[patent_app_type] => utility
[patent_app_number] => 17/737820
[patent_app_country] => US
[patent_app_date] => 2022-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16482
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17737820
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/737820 | SRAM design for energy efficient sequential access | May 4, 2022 | Issued |
Array
(
[id] => 18757233
[patent_doc_number] => 20230360691
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-09
[patent_title] => APPARATUSES FOR SENSE AMPLIFIER VOLTAGE CONTROL
[patent_app_type] => utility
[patent_app_number] => 17/737999
[patent_app_country] => US
[patent_app_date] => 2022-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7675
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17737999
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/737999 | Apparatuses for sense amplifier voltage control | May 4, 2022 | Issued |
Array
(
[id] => 19123395
[patent_doc_number] => 11967389
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-23
[patent_title] => Semiconductor apparatus related to a test function
[patent_app_type] => utility
[patent_app_number] => 17/737268
[patent_app_country] => US
[patent_app_date] => 2022-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 6336
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17737268
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/737268 | Semiconductor apparatus related to a test function | May 4, 2022 | Issued |
Array
(
[id] => 17795346
[patent_doc_number] => 20220254438
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-08-11
[patent_title] => JTAG BASED ARCHITECTURE ALLOWING MULTI-CORE OPERATION
[patent_app_type] => utility
[patent_app_number] => 17/734747
[patent_app_country] => US
[patent_app_date] => 2022-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11231
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17734747
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/734747 | JTAG based architecture allowing multi-core operation | May 1, 2022 | Issued |
Array
(
[id] => 19399484
[patent_doc_number] => 12073869
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-27
[patent_title] => Compute in memory system
[patent_app_type] => utility
[patent_app_number] => 17/734701
[patent_app_country] => US
[patent_app_date] => 2022-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 7366
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 211
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17734701
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/734701 | Compute in memory system | May 1, 2022 | Issued |
Array
(
[id] => 18039719
[patent_doc_number] => 20220383936
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-01
[patent_title] => MEMORY STRUCTURE AND MEMORY LAYOUT
[patent_app_type] => utility
[patent_app_number] => 17/661326
[patent_app_country] => US
[patent_app_date] => 2022-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9017
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17661326
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/661326 | Memory structure and memory layout | Apr 28, 2022 | Issued |
Array
(
[id] => 18729090
[patent_doc_number] => 20230343385
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-26
[patent_title] => IR DROP COMPENSATION FOR SENSING MEMORY
[patent_app_type] => utility
[patent_app_number] => 17/725712
[patent_app_country] => US
[patent_app_date] => 2022-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17592
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17725712
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/725712 | IR drop compensation for sensing memory | Apr 20, 2022 | Issued |
Array
(
[id] => 19228600
[patent_doc_number] => 12008237
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-11
[patent_title] => Memory bit cell with homogeneous layout pattern of base layers for high density memory macros
[patent_app_type] => utility
[patent_app_number] => 17/724123
[patent_app_country] => US
[patent_app_date] => 2022-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 12636
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17724123
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/724123 | Memory bit cell with homogeneous layout pattern of base layers for high density memory macros | Apr 18, 2022 | Issued |
Array
(
[id] => 18711577
[patent_doc_number] => 20230334206
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-19
[patent_title] => DIE LOCATION BASED LOGICAL BLOCK FORMATION AND HANDLING
[patent_app_type] => utility
[patent_app_number] => 17/659809
[patent_app_country] => US
[patent_app_date] => 2022-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16161
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17659809
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/659809 | Die location based logical block formation and handling | Apr 18, 2022 | Issued |
Array
(
[id] => 18198344
[patent_doc_number] => 20230051863
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-16
[patent_title] => MEMORY DEVICE FOR WAFER-ON-WAFER FORMED MEMORY AND LOGIC
[patent_app_type] => utility
[patent_app_number] => 17/712935
[patent_app_country] => US
[patent_app_date] => 2022-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8885
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -25
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17712935
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/712935 | Memory device for wafer-on-wafer formed memory and logic | Apr 3, 2022 | Issued |
Array
(
[id] => 17723160
[patent_doc_number] => 20220215882
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-07-07
[patent_title] => TERNARY CONTENT ADDRESSABLE MEMORY BASED ON MEMORY DIODE
[patent_app_type] => utility
[patent_app_number] => 17/704041
[patent_app_country] => US
[patent_app_date] => 2022-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2345
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -2
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17704041
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/704041 | Ternary content addressable memory based on memory diode | Mar 24, 2022 | Issued |
Array
(
[id] => 19191142
[patent_doc_number] => 20240170055
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-23
[patent_title] => ELECTRO-OPTICAL HIGH BANDWIDTH ULTRAFAST DIFFERENTIAL RAM
[patent_app_type] => utility
[patent_app_number] => 18/281662
[patent_app_country] => US
[patent_app_date] => 2022-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9966
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -45
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18281662
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/281662 | Electro-optical high bandwidth ultrafast differential RAM | Mar 13, 2022 | Issued |
Array
(
[id] => 20374020
[patent_doc_number] => 12481454
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-25
[patent_title] => Apparatus, method and system to implement a dual VDM scheme on a three-dimensional memory architecture
[patent_app_type] => utility
[patent_app_number] => 17/693199
[patent_app_country] => US
[patent_app_date] => 2022-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 15201
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17693199
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/693199 | Apparatus, method and system to implement a dual VDM scheme on a three-dimensional memory architecture | Mar 10, 2022 | Issued |