
Ming Cheung Po
Examiner (ID: 14994, Phone: (571)270-5552 , Office: P/1771 )
| Most Active Art Unit | 1771 |
| Art Unit(s) | 1797, 1771 |
| Total Applications | 795 |
| Issued Applications | 265 |
| Pending Applications | 99 |
| Abandoned Applications | 459 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18276901
[patent_doc_number] => 11615847
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-03-28
[patent_title] => Memory device and operating method of the memory device
[patent_app_type] => utility
[patent_app_number] => 17/183182
[patent_app_country] => US
[patent_app_date] => 2021-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 10884
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17183182
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/183182 | Memory device and operating method of the memory device | Feb 22, 2021 | Issued |
Array
(
[id] => 17787597
[patent_doc_number] => 11410731
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-09
[patent_title] => Semiconductor memory device and method of operating the same
[patent_app_type] => utility
[patent_app_number] => 17/176645
[patent_app_country] => US
[patent_app_date] => 2021-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 25
[patent_no_of_words] => 16288
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17176645
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/176645 | Semiconductor memory device and method of operating the same | Feb 15, 2021 | Issued |
Array
(
[id] => 17908703
[patent_doc_number] => 11462566
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-04
[patent_title] => Semiconductor memory device and methods of manufacturing and operating the same
[patent_app_type] => utility
[patent_app_number] => 17/174171
[patent_app_country] => US
[patent_app_date] => 2021-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 6298
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17174171
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/174171 | Semiconductor memory device and methods of manufacturing and operating the same | Feb 10, 2021 | Issued |
Array
(
[id] => 17269080
[patent_doc_number] => 11194505
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-12-07
[patent_title] => High bandwidth memory device and system device having the same
[patent_app_type] => utility
[patent_app_number] => 17/173754
[patent_app_country] => US
[patent_app_date] => 2021-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 19
[patent_no_of_words] => 12698
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17173754
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/173754 | High bandwidth memory device and system device having the same | Feb 10, 2021 | Issued |
Array
(
[id] => 17605794
[patent_doc_number] => 11334282
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-17
[patent_title] => High bandwidth memory device and system device having the same
[patent_app_type] => utility
[patent_app_number] => 17/173779
[patent_app_country] => US
[patent_app_date] => 2021-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 19
[patent_no_of_words] => 12697
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17173779
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/173779 | High bandwidth memory device and system device having the same | Feb 10, 2021 | Issued |
Array
(
[id] => 16873299
[patent_doc_number] => 20210166766
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-03
[patent_title] => METHOD OF PROGRAMMING IN FLASH MEMORY DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/172086
[patent_app_country] => US
[patent_app_date] => 2021-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3665
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17172086
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/172086 | Method of programming in flash memory devices | Feb 9, 2021 | Issued |
Array
(
[id] => 16873268
[patent_doc_number] => 20210166735
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-03
[patent_title] => Voltage Regulation Circuit
[patent_app_type] => utility
[patent_app_number] => 17/171333
[patent_app_country] => US
[patent_app_date] => 2021-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10487
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 226
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17171333
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/171333 | Voltage regulation circuit | Feb 8, 2021 | Issued |
Array
(
[id] => 18371640
[patent_doc_number] => 11651821
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-05-16
[patent_title] => Adaptive program verify scheme for performance improvement
[patent_app_type] => utility
[patent_app_number] => 17/170498
[patent_app_country] => US
[patent_app_date] => 2021-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5341
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17170498
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/170498 | Adaptive program verify scheme for performance improvement | Feb 7, 2021 | Issued |
Array
(
[id] => 17500423
[patent_doc_number] => 11289132
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-03-29
[patent_title] => Operation method of memory device
[patent_app_type] => utility
[patent_app_number] => 17/168215
[patent_app_country] => US
[patent_app_date] => 2021-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2689
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17168215
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/168215 | Operation method of memory device | Feb 4, 2021 | Issued |
Array
(
[id] => 17373399
[patent_doc_number] => 20220028451
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-01-27
[patent_title] => NONVOLATILE MEMORY APPARATUS PERFORMING CONSECUTIVE ACCESS OPERATIONS AND AN OPERATION METHOD OF THE NONVOLATILE MEMORY APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/163077
[patent_app_country] => US
[patent_app_date] => 2021-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8979
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17163077
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/163077 | Nonvolatile memory apparatus performing consecutive access operations and an operation method of the nonvolatile memory apparatus | Jan 28, 2021 | Issued |
Array
(
[id] => 17606908
[patent_doc_number] => 11335400
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-17
[patent_title] => Computing-in-memory chip and memory cell array structure
[patent_app_type] => utility
[patent_app_number] => 17/160292
[patent_app_country] => US
[patent_app_date] => 2021-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 8429
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17160292
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/160292 | Computing-in-memory chip and memory cell array structure | Jan 26, 2021 | Issued |
Array
(
[id] => 16850355
[patent_doc_number] => 20210151100
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-20
[patent_title] => METHOD FOR PROGRAMMING MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/160338
[patent_app_country] => US
[patent_app_date] => 2021-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5299
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17160338
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/160338 | Method for programming memory system | Jan 26, 2021 | Issued |
Array
(
[id] => 17239352
[patent_doc_number] => 11183240
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-23
[patent_title] => Programmable resistive memory element and a method of making the same
[patent_app_type] => utility
[patent_app_number] => 17/158731
[patent_app_country] => US
[patent_app_date] => 2021-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1512
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17158731
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/158731 | Programmable resistive memory element and a method of making the same | Jan 25, 2021 | Issued |
Array
(
[id] => 17825578
[patent_doc_number] => 11430530
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-30
[patent_title] => Deep learning based program-verify modeling and voltage estimation for memory devices
[patent_app_type] => utility
[patent_app_number] => 17/157495
[patent_app_country] => US
[patent_app_date] => 2021-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 6208
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17157495
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/157495 | Deep learning based program-verify modeling and voltage estimation for memory devices | Jan 24, 2021 | Issued |
Array
(
[id] => 17825578
[patent_doc_number] => 11430530
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-30
[patent_title] => Deep learning based program-verify modeling and voltage estimation for memory devices
[patent_app_type] => utility
[patent_app_number] => 17/157495
[patent_app_country] => US
[patent_app_date] => 2021-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 6208
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17157495
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/157495 | Deep learning based program-verify modeling and voltage estimation for memory devices | Jan 24, 2021 | Issued |
Array
(
[id] => 17825578
[patent_doc_number] => 11430530
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-30
[patent_title] => Deep learning based program-verify modeling and voltage estimation for memory devices
[patent_app_type] => utility
[patent_app_number] => 17/157495
[patent_app_country] => US
[patent_app_date] => 2021-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 6208
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17157495
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/157495 | Deep learning based program-verify modeling and voltage estimation for memory devices | Jan 24, 2021 | Issued |
Array
(
[id] => 17825578
[patent_doc_number] => 11430530
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-30
[patent_title] => Deep learning based program-verify modeling and voltage estimation for memory devices
[patent_app_type] => utility
[patent_app_number] => 17/157495
[patent_app_country] => US
[patent_app_date] => 2021-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 6208
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17157495
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/157495 | Deep learning based program-verify modeling and voltage estimation for memory devices | Jan 24, 2021 | Issued |
Array
(
[id] => 17373387
[patent_doc_number] => 20220028439
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-01-27
[patent_title] => MEMORY CIRCUIT AND METHOD OF OPERATING SAME
[patent_app_type] => utility
[patent_app_number] => 17/154514
[patent_app_country] => US
[patent_app_date] => 2021-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17229
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17154514
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/154514 | Memory circuit and method of operating same | Jan 20, 2021 | Issued |
Array
(
[id] => 16965974
[patent_doc_number] => 20210217473
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-15
[patent_title] => VERTICAL NONVOLATILE MEMORY DEVICE INCLUDING MEMORY CELL STRING
[patent_app_type] => utility
[patent_app_number] => 17/146999
[patent_app_country] => US
[patent_app_date] => 2021-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12935
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -30
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17146999
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/146999 | Vertical nonvolatile memory device including memory cell string | Jan 11, 2021 | Issued |
Array
(
[id] => 17477086
[patent_doc_number] => 20220084590
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-17
[patent_title] => SENSE AMPLIFIER CIRCUIT FOR PREVENTING READ DISTURB
[patent_app_type] => utility
[patent_app_number] => 17/143112
[patent_app_country] => US
[patent_app_date] => 2021-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6322
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17143112
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/143112 | Sense amplifier circuit for preventing read disturb | Jan 5, 2021 | Issued |