Ming Y. Hon

Array ( [id] => 6946638 [patent_doc_number] => 20050198464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'Lazy stack memory allocation in systems with virtual memory' [patent_app_type] => utility [patent_app_number] => 11/071868 [patent_app_country] => US [patent_app_date] => 2005-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4201 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20050198464.pdf [firstpage_image] =>[orig_patent_app_number] => 11071868 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5681905 [patent_doc_number] => 20060198175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-07 [patent_title] => 'Method, system, and apparatus high speed interconnect to improve data rates of memory subsystems' [patent_app_type] => utility [patent_app_number] => 11/072953 [patent_app_country] => US [patent_app_date] => 2005-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1371 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20060198175.pdf [firstpage_image] =>[orig_patent_app_number] => 11072953 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5657686 [patent_doc_number] => 20060143422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Storage control system' [patent_app_type] => utility [patent_app_number] => 11/070247 [patent_app_country] => US [patent_app_date] => 2005-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10766 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0143/20060143422.pdf [firstpage_image] =>[orig_patent_app_number] => 11070247 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5657689 [patent_doc_number] => 20060143425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Storage system and storage management system' [patent_app_type] => utility [patent_app_number] => 11/070207 [patent_app_country] => US [patent_app_date] => 2005-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 10746 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0143/20060143425.pdf [firstpage_image] =>[orig_patent_app_number] => 11070207 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 438346 [patent_doc_number] => 07263577 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-28 [patent_title] => 'Power saving methods and apparatus to selectively enable comparators in a CAM renaming register file based on known processor state' [patent_app_type] => utility [patent_app_number] => 11/072849 [patent_app_country] => US [patent_app_date] => 2005-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4948 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/263/07263577.pdf [firstpage_image] =>[orig_patent_app_number] => 11072849 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5684361 [patent_doc_number] => 20060200631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-07 [patent_title] => 'Control circuit and control method' [patent_app_type] => utility [patent_app_number] => 11/068862 [patent_app_country] => US [patent_app_date] => 2005-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10100 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20060200631.pdf [firstpage_image] =>[orig_patent_app_number] => 11068862 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9611598 [patent_doc_number] => 08788787 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-22 [patent_title] => 'Systems, methods and architecture for facilitating software access to acceleration technology' [patent_app_type] => utility [patent_app_number] => 11/070947 [patent_app_country] => US [patent_app_date] => 2005-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3809 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11070947 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 571300 [patent_doc_number] => 07469332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-23 [patent_title] => 'Systems and methods for adaptively mapping an instruction cache' [patent_app_type] => utility [patent_app_number] => 11/070758 [patent_app_country] => US [patent_app_date] => 2005-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5956 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 354 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/469/07469332.pdf [firstpage_image] =>[orig_patent_app_number] => 11070758 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7177801 [patent_doc_number] => 20050204103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-15 [patent_title] => 'Split queuing' [patent_app_type] => utility [patent_app_number] => 11/070866 [patent_app_country] => US [patent_app_date] => 2005-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4146 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20050204103.pdf [firstpage_image] =>[orig_patent_app_number] => 11070866 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 825559 [patent_doc_number] => 07406572 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-07-29 [patent_title] => 'Universal memory circuit architecture supporting multiple memory interface options' [patent_app_type] => utility [patent_app_number] => 11/069499 [patent_app_country] => US [patent_app_date] => 2005-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7721 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/406/07406572.pdf [firstpage_image] =>[orig_patent_app_number] => 11069499 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5867072 [patent_doc_number] => 20060101203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Storage virtualization apparatus' [patent_app_type] => utility [patent_app_number] => 11/066488 [patent_app_country] => US [patent_app_date] => 2005-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2399 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20060101203.pdf [firstpage_image] =>[orig_patent_app_number] => 11066488 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5706609 [patent_doc_number] => 20060195657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Expandable RAID method and device' [patent_app_type] => utility [patent_app_number] => 11/068296 [patent_app_country] => US [patent_app_date] => 2005-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4080 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20060195657.pdf [firstpage_image] =>[orig_patent_app_number] => 11068296 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5867085 [patent_doc_number] => 20060101216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Disk array apparatus, method of data recovery, and computer product' [patent_app_type] => utility [patent_app_number] => 11/067329 [patent_app_country] => US [patent_app_date] => 2005-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6990 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20060101216.pdf [firstpage_image] =>[orig_patent_app_number] => 11067329 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5615211 [patent_doc_number] => 20060117140 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-01 [patent_title] => 'Memory control device and memory control method' [patent_app_type] => utility [patent_app_number] => 11/066760 [patent_app_country] => US [patent_app_date] => 2005-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6558 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20060117140.pdf [firstpage_image] =>[orig_patent_app_number] => 11066760 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5706614 [patent_doc_number] => 20060195662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Method for deterministic cache partitioning' [patent_app_type] => utility [patent_app_number] => 11/068194 [patent_app_country] => US [patent_app_date] => 2005-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3637 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20060195662.pdf [firstpage_image] =>[orig_patent_app_number] => 11068194 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7798380 [patent_doc_number] => 08127098 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-02-28 [patent_title] => 'Virtualization of real mode execution' [patent_app_type] => utility [patent_app_number] => 11/066873 [patent_app_country] => US [patent_app_date] => 2005-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 9608 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/127/08127098.pdf [firstpage_image] =>[orig_patent_app_number] => 11066873 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6961845 [patent_doc_number] => 20050216554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-29 [patent_title] => 'Use of cache memory for decreasing the number of requests forwarded to server computers' [patent_app_type] => utility [patent_app_number] => 11/059863 [patent_app_country] => US [patent_app_date] => 2005-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3871 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20050216554.pdf [firstpage_image] =>[orig_patent_app_number] => 11059863 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7057305 [patent_doc_number] => 20050278480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-15 [patent_title] => 'Method of writing data into flash memory' [patent_app_type] => utility [patent_app_number] => 11/055996 [patent_app_country] => US [patent_app_date] => 2005-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3640 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20050278480.pdf [firstpage_image] =>[orig_patent_app_number] => 11055996 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7598119 [patent_doc_number] => 07584334 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-01 [patent_title] => 'Systems and methods for an improved tailgate device' [patent_app_type] => utility [patent_app_number] => 11/056046 [patent_app_country] => US [patent_app_date] => 2005-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4297 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/584/07584334.pdf [firstpage_image] =>[orig_patent_app_number] => 11056046 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5679370 [patent_doc_number] => 20060184726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Flexible access and control of Dynamic Random Access Memory' [patent_app_type] => utility [patent_app_number] => 11/057063 [patent_app_country] => US [patent_app_date] => 2005-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4092 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20060184726.pdf [firstpage_image] =>[orig_patent_app_number] => 11057063 [rel_patent_id] =>[rel_patent_doc_number] =>)