Search

Minh Chau Pham

Examiner (ID: 11116)

Most Active Art Unit
3653
Art Unit(s)
3653, 3654
Total Applications
257
Issued Applications
241
Pending Applications
8
Abandoned Applications
8

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5810448 [patent_doc_number] => 20060081556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-20 [patent_title] => 'DEEP TRENCH FORMATION IN SEMICONDUCTOR DEVICE FABRICATION' [patent_app_type] => utility [patent_app_number] => 10/711953 [patent_app_country] => US [patent_app_date] => 2004-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3388 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20060081556.pdf [firstpage_image] =>[orig_patent_app_number] => 10711953 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/711953
Deep trench formation in semiconductor device fabrication Oct 14, 2004 Issued
Array ( [id] => 671686 [patent_doc_number] => 07090782 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-08-15 [patent_title] => 'Etch with uniformity control' [patent_app_type] => utility [patent_app_number] => 10/934324 [patent_app_country] => US [patent_app_date] => 2004-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3405 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/090/07090782.pdf [firstpage_image] =>[orig_patent_app_number] => 10934324 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/934324
Etch with uniformity control Sep 2, 2004 Issued
Array ( [id] => 6943004 [patent_doc_number] => 20050195052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'Methods and apparatus for printing conductive thickfilms over thickfilm dielectrics' [patent_app_type] => utility [patent_app_number] => 10/793022 [patent_app_country] => US [patent_app_date] => 2004-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1986 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20050195052.pdf [firstpage_image] =>[orig_patent_app_number] => 10793022 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/793022
Methods and apparatus for printing conductive thickfilms over thickfilm dielectrics Mar 2, 2004 Issued
Array ( [id] => 701585 [patent_doc_number] => 07064078 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-20 [patent_title] => 'Techniques for the use of amorphous carbon (APF) for various etch and litho integration scheme' [patent_app_type] => utility [patent_app_number] => 10/768724 [patent_app_country] => US [patent_app_date] => 2004-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 17 [patent_no_of_words] => 4135 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/064/07064078.pdf [firstpage_image] =>[orig_patent_app_number] => 10768724 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/768724
Techniques for the use of amorphous carbon (APF) for various etch and litho integration scheme Jan 29, 2004 Issued
Array ( [id] => 7677500 [patent_doc_number] => 20040152326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'Multicrystalline silicon substrate and process for roughening surface thereof' [patent_app_type] => new [patent_app_number] => 10/762676 [patent_app_country] => US [patent_app_date] => 2004-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4430 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20040152326.pdf [firstpage_image] =>[orig_patent_app_number] => 10762676 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/762676
Multicrystalline silicon substrate and process for roughening surface thereof Jan 21, 2004 Issued
Array ( [id] => 637855 [patent_doc_number] => 07125808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-24 [patent_title] => 'Method for manufacturing non-volatile memory cells on a semiconductor substrate' [patent_app_type] => utility [patent_app_number] => 10/749020 [patent_app_country] => US [patent_app_date] => 2003-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 27 [patent_no_of_words] => 5378 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/125/07125808.pdf [firstpage_image] =>[orig_patent_app_number] => 10749020 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/749020
Method for manufacturing non-volatile memory cells on a semiconductor substrate Dec 28, 2003 Issued
Array ( [id] => 637854 [patent_doc_number] => 07125807 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-24 [patent_title] => 'Method for manufacturing non-volatile memory cells on a semiconductor substrate' [patent_app_type] => utility [patent_app_number] => 10/746878 [patent_app_country] => US [patent_app_date] => 2003-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 12 [patent_no_of_words] => 3489 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/125/07125807.pdf [firstpage_image] =>[orig_patent_app_number] => 10746878 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/746878
Method for manufacturing non-volatile memory cells on a semiconductor substrate Dec 22, 2003 Issued
Array ( [id] => 7430221 [patent_doc_number] => 20040266199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Method of manufacturing flash memory device' [patent_app_type] => new [patent_app_number] => 10/736720 [patent_app_country] => US [patent_app_date] => 2003-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2922 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20040266199.pdf [firstpage_image] =>[orig_patent_app_number] => 10736720 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/736720
Method of manufacturing flash memory device Dec 15, 2003 Issued
Array ( [id] => 697776 [patent_doc_number] => 07067067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-27 [patent_title] => 'Method of fabricating an ink jet printhead chip with active and passive nozzle chamber structures' [patent_app_type] => utility [patent_app_number] => 10/693977 [patent_app_country] => US [patent_app_date] => 2003-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 91 [patent_no_of_words] => 8692 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 425 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/067/07067067.pdf [firstpage_image] =>[orig_patent_app_number] => 10693977 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/693977
Method of fabricating an ink jet printhead chip with active and passive nozzle chamber structures Oct 27, 2003 Issued
Array ( [id] => 7289871 [patent_doc_number] => 20040110386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'Method and device for photo-electrochemically etching a semiconductor sample, especially gallium nitride' [patent_app_type] => new [patent_app_number] => 10/693771 [patent_app_country] => US [patent_app_date] => 2003-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5511 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20040110386.pdf [firstpage_image] =>[orig_patent_app_number] => 10693771 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/693771
Method and device for photo-electrochemically etching a semiconductor sample, especially gallium nitride Oct 23, 2003 Issued
Array ( [id] => 668373 [patent_doc_number] => 07094613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-22 [patent_title] => 'Method for controlling accuracy and repeatability of an etch process' [patent_app_type] => utility [patent_app_number] => 10/690318 [patent_app_country] => US [patent_app_date] => 2003-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6686 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/094/07094613.pdf [firstpage_image] =>[orig_patent_app_number] => 10690318 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/690318
Method for controlling accuracy and repeatability of an etch process Oct 20, 2003 Issued
Array ( [id] => 7235491 [patent_doc_number] => 20050079724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-14 [patent_title] => 'METHOD FOR DEEP TRENCH ETCHING THROUGH A BURIED INSULATOR LAYER' [patent_app_type] => utility [patent_app_number] => 10/605607 [patent_app_country] => US [patent_app_date] => 2003-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2311 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20050079724.pdf [firstpage_image] =>[orig_patent_app_number] => 10605607 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/605607
Method for deep trench etching through a buried insulator layer Oct 12, 2003 Issued
Array ( [id] => 772607 [patent_doc_number] => 07001533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-21 [patent_title] => 'Chromate-free method for surface etching of aluminum and aluminum alloys' [patent_app_type] => utility [patent_app_number] => 10/679684 [patent_app_country] => US [patent_app_date] => 2003-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2476 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/001/07001533.pdf [firstpage_image] =>[orig_patent_app_number] => 10679684 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/679684
Chromate-free method for surface etching of aluminum and aluminum alloys Oct 5, 2003 Issued
Array ( [id] => 748339 [patent_doc_number] => 07022254 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-04 [patent_title] => 'Chromate-free method for surface etching of titanium' [patent_app_type] => utility [patent_app_number] => 10/679682 [patent_app_country] => US [patent_app_date] => 2003-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2474 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/022/07022254.pdf [firstpage_image] =>[orig_patent_app_number] => 10679682 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/679682
Chromate-free method for surface etching of titanium Oct 5, 2003 Issued
Array ( [id] => 938437 [patent_doc_number] => 06972266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-06 [patent_title] => 'Top oxide nitride liner integration scheme for vertical DRAM' [patent_app_type] => utility [patent_app_number] => 10/605438 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4527 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/972/06972266.pdf [firstpage_image] =>[orig_patent_app_number] => 10605438 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/605438
Top oxide nitride liner integration scheme for vertical DRAM Sep 29, 2003 Issued
Array ( [id] => 7011007 [patent_doc_number] => 20050064723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-24 [patent_title] => 'Method To Reduce Stacking Fault Nucleation Sites And Reduce Forward Voltage Drift In Bipolar Devices' [patent_app_type] => utility [patent_app_number] => 10/605312 [patent_app_country] => US [patent_app_date] => 2003-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5235 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20050064723.pdf [firstpage_image] =>[orig_patent_app_number] => 10605312 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/605312
Method to reduce stacking fault nucleation sites and reduce forward voltage drift in bipolar devices Sep 21, 2003 Issued
Array ( [id] => 963658 [patent_doc_number] => 06949470 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-27 [patent_title] => 'Method for manufacturing circuit devices' [patent_app_type] => utility [patent_app_number] => 10/664333 [patent_app_country] => US [patent_app_date] => 2003-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 4461 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/949/06949470.pdf [firstpage_image] =>[orig_patent_app_number] => 10664333 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/664333
Method for manufacturing circuit devices Sep 16, 2003 Issued
Array ( [id] => 968198 [patent_doc_number] => 06939472 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-06 [patent_title] => 'Etching method in fabrications of microstructures' [patent_app_type] => utility [patent_app_number] => 10/665998 [patent_app_country] => US [patent_app_date] => 2003-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6234 [patent_no_of_claims] => 100 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/939/06939472.pdf [firstpage_image] =>[orig_patent_app_number] => 10665998 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/665998
Etching method in fabrications of microstructures Sep 16, 2003 Issued
Array ( [id] => 741164 [patent_doc_number] => 07030033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-18 [patent_title] => 'Method for manufacturing circuit devices' [patent_app_type] => utility [patent_app_number] => 10/663394 [patent_app_country] => US [patent_app_date] => 2003-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 5771 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/030/07030033.pdf [firstpage_image] =>[orig_patent_app_number] => 10663394 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/663394
Method for manufacturing circuit devices Sep 15, 2003 Issued
Array ( [id] => 7675073 [patent_doc_number] => 20040127045 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Chemical mechanical planarization of wafers or films using fixed polishing pads and a nanoparticle composition' [patent_app_type] => new [patent_app_number] => 10/662215 [patent_app_country] => US [patent_app_date] => 2003-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5461 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20040127045.pdf [firstpage_image] =>[orig_patent_app_number] => 10662215 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/662215
Chemical mechanical planarization of wafers or films using fixed polishing pads and a nanoparticle composition Sep 11, 2003 Abandoned
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