Search

Minh D. Dinh

Examiner (ID: 3390, Phone: (571)270-5375 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827, 2825
Total Applications
480
Issued Applications
442
Pending Applications
36
Abandoned Applications
13

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14784359 [patent_doc_number] => 20190267077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/411698 [patent_app_country] => US [patent_app_date] => 2019-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14170 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411698 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/411698
Semiconductor device May 13, 2019 Issued
Array ( [id] => 14784359 [patent_doc_number] => 20190267077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/411698 [patent_app_country] => US [patent_app_date] => 2019-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14170 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411698 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/411698
Semiconductor device May 13, 2019 Issued
Array ( [id] => 14784359 [patent_doc_number] => 20190267077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/411698 [patent_app_country] => US [patent_app_date] => 2019-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14170 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411698 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/411698
Semiconductor device May 13, 2019 Issued
Array ( [id] => 14784359 [patent_doc_number] => 20190267077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/411698 [patent_app_country] => US [patent_app_date] => 2019-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14170 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411698 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/411698
Semiconductor device May 13, 2019 Issued
Array ( [id] => 14784421 [patent_doc_number] => 20190267108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/410815 [patent_app_country] => US [patent_app_date] => 2019-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18837 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16410815 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/410815
Semiconductor memory device May 12, 2019 Issued
Array ( [id] => 16645303 [patent_doc_number] => 10923167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/400454 [patent_app_country] => US [patent_app_date] => 2019-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5821 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16400454 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/400454
Semiconductor devices Apr 30, 2019 Issued
Array ( [id] => 16424801 [patent_doc_number] => 20200349999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => DRAM ARRAY ARCHITECTURE WITH ROW HAMMER STRESS MITIGATION [patent_app_type] => utility [patent_app_number] => 16/399283 [patent_app_country] => US [patent_app_date] => 2019-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14879 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16399283 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/399283
DRAM array architecture with row hammer stress mitigation Apr 29, 2019 Issued
Array ( [id] => 15060999 [patent_doc_number] => 10460811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => Array of three-gate flash memory cells with individual memory cell read, program and erase [patent_app_type] => utility [patent_app_number] => 16/387377 [patent_app_country] => US [patent_app_date] => 2019-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2338 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16387377 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/387377
Array of three-gate flash memory cells with individual memory cell read, program and erase Apr 16, 2019 Issued
Array ( [id] => 16233674 [patent_doc_number] => 10741234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-11 [patent_title] => Self-reference for ferroelectric memory [patent_app_type] => utility [patent_app_number] => 16/366656 [patent_app_country] => US [patent_app_date] => 2019-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12217 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16366656 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/366656
Self-reference for ferroelectric memory Mar 26, 2019 Issued
Array ( [id] => 15717105 [patent_doc_number] => 20200105320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/283706 [patent_app_country] => US [patent_app_date] => 2019-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5373 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16283706 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/283706
Memory device Feb 21, 2019 Issued
Array ( [id] => 16759599 [patent_doc_number] => 10978154 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/250324 [patent_app_country] => US [patent_app_date] => 2019-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 41 [patent_no_of_words] => 14817 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16250324 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/250324
Semiconductor device Jan 16, 2019 Issued
Array ( [id] => 16880927 [patent_doc_number] => 11031083 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Apparatuses and methods for decoding addresses for memory [patent_app_type] => utility [patent_app_number] => 16/249714 [patent_app_country] => US [patent_app_date] => 2019-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5879 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16249714 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/249714
Apparatuses and methods for decoding addresses for memory Jan 15, 2019 Issued
Array ( [id] => 14616503 [patent_doc_number] => 10360955 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-23 [patent_title] => Apparatuses including multiple read modes and methods for same [patent_app_type] => utility [patent_app_number] => 16/235951 [patent_app_country] => US [patent_app_date] => 2018-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7432 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16235951 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/235951
Apparatuses including multiple read modes and methods for same Dec 27, 2018 Issued
Array ( [id] => 16021083 [patent_doc_number] => 20200185385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => APPARATUSES INCLUDING 3D MEMORY ARRAYS, METHODS OF FORMING THE APPARATUSES, AND RELATED ELECTRONIC SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/212418 [patent_app_country] => US [patent_app_date] => 2018-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18873 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16212418 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/212418
Apparatuses including 3D memory arrays, methods of forming the apparatuses, and related electronic systems Dec 5, 2018 Issued
Array ( [id] => 16021503 [patent_doc_number] => 20200185595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => SPIN-TRANSFER TORQUE MRAM WITH MAGNETICALLY COUPLED ASSIST LAYERS AND METHODS OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/212342 [patent_app_country] => US [patent_app_date] => 2018-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7949 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16212342 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/212342
Spin-transfer torque MRAM with magnetically coupled assist layers and methods of operating the same Dec 5, 2018 Issued
Array ( [id] => 15140943 [patent_doc_number] => 10483970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Dynamic termination edge control [patent_app_type] => utility [patent_app_number] => 16/200450 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5475 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16200450 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/200450
Dynamic termination edge control Nov 25, 2018 Issued
Array ( [id] => 16536252 [patent_doc_number] => 10878865 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Memory device and signal transmitting circuit thereof [patent_app_type] => utility [patent_app_number] => 16/196226 [patent_app_country] => US [patent_app_date] => 2018-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4679 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16196226 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/196226
Memory device and signal transmitting circuit thereof Nov 19, 2018 Issued
Array ( [id] => 15045175 [patent_doc_number] => 20190333592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/197082 [patent_app_country] => US [patent_app_date] => 2018-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9541 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16197082 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/197082
Memory device and operating method of the memory device Nov 19, 2018 Issued
Array ( [id] => 14874691 [patent_doc_number] => 20190287587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => INPUT/OUTPUT CIRCUIT AND MEMORY DEVICE HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 16/194834 [patent_app_country] => US [patent_app_date] => 2018-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6901 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16194834 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/194834
Input/output circuit and memory device having the same Nov 18, 2018 Issued
Array ( [id] => 16609062 [patent_doc_number] => 10910075 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-02 [patent_title] => Programming process combining adaptive verify with normal and slow programming speeds in a memory device [patent_app_type] => utility [patent_app_number] => 16/189200 [patent_app_country] => US [patent_app_date] => 2018-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 46 [patent_no_of_words] => 22568 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16189200 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/189200
Programming process combining adaptive verify with normal and slow programming speeds in a memory device Nov 12, 2018 Issued
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