
Minh D. Dinh
Examiner (ID: 16802, Phone: (571)270-5375 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2825, 2827 |
| Total Applications | 472 |
| Issued Applications | 435 |
| Pending Applications | 37 |
| Abandoned Applications | 13 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11710240
[patent_doc_number] => 20170178740
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-22
[patent_title] => 'NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/381724
[patent_app_country] => US
[patent_app_date] => 2016-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7526
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15381724
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/381724 | Nonvolatile memory device and method of programming the same | Dec 15, 2016 | Issued |
Array
(
[id] => 12174632
[patent_doc_number] => 09892778
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-02-13
[patent_title] => 'Memory device, memory system including the same, operation method of the memory system'
[patent_app_type] => utility
[patent_app_number] => 15/380404
[patent_app_country] => US
[patent_app_date] => 2016-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 4660
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15380404
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/380404 | Memory device, memory system including the same, operation method of the memory system | Dec 14, 2016 | Issued |
Array
(
[id] => 12497766
[patent_doc_number] => 09997211
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-06-12
[patent_title] => Semiconductor memory apparatus and operating method
[patent_app_type] => utility
[patent_app_number] => 15/378308
[patent_app_country] => US
[patent_app_date] => 2016-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3686
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15378308
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/378308 | Semiconductor memory apparatus and operating method | Dec 13, 2016 | Issued |
Array
(
[id] => 11666661
[patent_doc_number] => 20170155380
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-01
[patent_title] => 'LATCHED COMPARATOR CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 15/372958
[patent_app_country] => US
[patent_app_date] => 2016-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 10622
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15372958
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/372958 | Latched comparator circuit | Dec 7, 2016 | Issued |
Array
(
[id] => 13893115
[patent_doc_number] => 10199109
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-05
[patent_title] => Low power sense amplifier for a flash memory system
[patent_app_type] => utility
[patent_app_number] => 15/371496
[patent_app_country] => US
[patent_app_date] => 2016-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 2243
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 211
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15371496
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/371496 | Low power sense amplifier for a flash memory system | Dec 6, 2016 | Issued |
Array
(
[id] => 12800011
[patent_doc_number] => 20180158506
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-06-07
[patent_title] => PULSE-STRETCHER CLOCK GENERATOR CIRCUIT FOR HIGH SPEED MEMORY SUBSYSTEMS
[patent_app_type] => utility
[patent_app_number] => 15/370892
[patent_app_country] => US
[patent_app_date] => 2016-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7380
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15370892
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/370892 | Pulse-stretcher clock generator circuit for high speed memory subsystems | Dec 5, 2016 | Issued |
Array
(
[id] => 11746439
[patent_doc_number] => 20170200512
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-07-13
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/296428
[patent_app_country] => US
[patent_app_date] => 2016-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 8199
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15296428
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/296428 | Semiconductor memory device and memory system including the same | Oct 17, 2016 | Issued |
Array
(
[id] => 11630610
[patent_doc_number] => 20170140799
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-05-18
[patent_title] => 'DATA OUTPUT CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/294890
[patent_app_country] => US
[patent_app_date] => 2016-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 10916
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15294890
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/294890 | Data output circuit and memory device including the same | Oct 16, 2016 | Issued |
Array
(
[id] => 11753217
[patent_doc_number] => 09711235
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-07-18
[patent_title] => 'Nonvolatile memory device, storage device having the same, operating method thereof'
[patent_app_type] => utility
[patent_app_number] => 15/295536
[patent_app_country] => US
[patent_app_date] => 2016-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 33
[patent_no_of_words] => 11256
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15295536
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/295536 | Nonvolatile memory device, storage device having the same, operating method thereof | Oct 16, 2016 | Issued |
Array
(
[id] => 11831502
[patent_doc_number] => 09728250
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-08
[patent_title] => 'Memory write tracking device and method'
[patent_app_type] => utility
[patent_app_number] => 15/295656
[patent_app_country] => US
[patent_app_date] => 2016-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 6377
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15295656
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/295656 | Memory write tracking device and method | Oct 16, 2016 | Issued |
Array
(
[id] => 12054285
[patent_doc_number] => 20170330628
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-16
[patent_title] => 'NONVOLATILE MEMORY DEVICE INCLUDING SUB COMMON SOURCES'
[patent_app_type] => utility
[patent_app_number] => 15/294948
[patent_app_country] => US
[patent_app_date] => 2016-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 13147
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15294948
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/294948 | Nonvolatile memory device including sub common sources | Oct 16, 2016 | Issued |
Array
(
[id] => 11404629
[patent_doc_number] => 20170025167
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-01-26
[patent_title] => 'Static Random Access Memory with Reduced Write Power'
[patent_app_type] => utility
[patent_app_number] => 15/284890
[patent_app_country] => US
[patent_app_date] => 2016-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4688
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15284890
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/284890 | Static random access memory with reduced write power | Oct 3, 2016 | Issued |
Array
(
[id] => 11983392
[patent_doc_number] => 20170287547
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-05
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/281818
[patent_app_country] => US
[patent_app_date] => 2016-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 14799
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15281818
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/281818 | Semiconductor device | Sep 29, 2016 | Issued |
Array
(
[id] => 12250355
[patent_doc_number] => 09923140
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-20
[patent_title] => 'Low power barrier modulated cell for storage class memory'
[patent_app_type] => utility
[patent_app_number] => 15/269999
[patent_app_country] => US
[patent_app_date] => 2016-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 31
[patent_no_of_words] => 12665
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15269999
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/269999 | Low power barrier modulated cell for storage class memory | Sep 19, 2016 | Issued |
Array
(
[id] => 11817693
[patent_doc_number] => 09721650
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-08-01
[patent_title] => 'Architecture to improve write-ability in SRAM'
[patent_app_type] => utility
[patent_app_number] => 15/269620
[patent_app_country] => US
[patent_app_date] => 2016-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 10275
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15269620
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/269620 | Architecture to improve write-ability in SRAM | Sep 18, 2016 | Issued |
Array
(
[id] => 11910994
[patent_doc_number] => 09779812
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-10-03
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 15/269523
[patent_app_country] => US
[patent_app_date] => 2016-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 16
[patent_no_of_words] => 6999
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15269523
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/269523 | Semiconductor memory device | Sep 18, 2016 | Issued |
Array
(
[id] => 11557566
[patent_doc_number] => 20170103812
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-04-13
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 15/259300
[patent_app_country] => US
[patent_app_date] => 2016-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 12532
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15259300
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/259300 | Semiconductor memory device and operating method thereof | Sep 7, 2016 | Issued |
Array
(
[id] => 11366901
[patent_doc_number] => 20170004882
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-01-05
[patent_title] => 'DISTRIBUTED CASCODE CURRENT SOURCE FOR RRAM SET CURRENT LIMITATION'
[patent_app_type] => utility
[patent_app_number] => 15/256465
[patent_app_country] => US
[patent_app_date] => 2016-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2273
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15256465
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/256465 | Distributed cascode current source for RRAM set current limitation | Sep 1, 2016 | Issued |
Array
(
[id] => 12968638
[patent_doc_number] => 09875780
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-01-23
[patent_title] => STT MRAM source line configuration
[patent_app_type] => utility
[patent_app_number] => 15/251564
[patent_app_country] => US
[patent_app_date] => 2016-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4346
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15251564
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/251564 | STT MRAM source line configuration | Aug 29, 2016 | Issued |
Array
(
[id] => 11557572
[patent_doc_number] => 20170103818
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-04-13
[patent_title] => 'METHODS AND APPARATUSES INCLUDING ONE OR MORE INTERRUPTED INTEGRATED CIRCUIT OPERATIONS FOR CHARACTERIZING RADIATION EFFECTS IN INTEGRATED CIRCUITS'
[patent_app_type] => utility
[patent_app_number] => 15/206904
[patent_app_country] => US
[patent_app_date] => 2016-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 6769
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15206904
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/206904 | Methods and apparatuses including one or more interrupted integrated circuit operations for characterizing radiation effects in integrated circuits | Jul 10, 2016 | Issued |