Search

Minh D. Dinh

Examiner (ID: 16802, Phone: (571)270-5375 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2825, 2827
Total Applications
472
Issued Applications
435
Pending Applications
37
Abandoned Applications
13

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18827483 [patent_doc_number] => 11842772 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-12 [patent_title] => Voltage bin boundary calibration at memory device power up [patent_app_type] => utility [patent_app_number] => 17/857942 [patent_app_country] => US [patent_app_date] => 2022-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11561 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17857942 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/857942
Voltage bin boundary calibration at memory device power up Jul 4, 2022 Issued
Array ( [id] => 19906285 [patent_doc_number] => 12283297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 17/843084 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 9577 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843084 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/843084
Memory device Jun 16, 2022 Issued
Array ( [id] => 18081236 [patent_doc_number] => 20220406848 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/840213 [patent_app_country] => US [patent_app_date] => 2022-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7231 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840213 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/840213
Semiconductor memory device Jun 13, 2022 Issued
Array ( [id] => 18833583 [patent_doc_number] => 20230402110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => STATE LOOK AHEAD QUICK PASS WRITE ALGORITHM TO TIGHTEN ONGOING NATURAL THRESHOLD VOLTAGE OF UPCOMING STATES FOR PROGRAM TIME REDUCTION [patent_app_type] => utility [patent_app_number] => 17/837903 [patent_app_country] => US [patent_app_date] => 2022-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24638 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17837903 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/837903
State look ahead quick pass write algorithm to tighten ongoing natural threshold voltage of upcoming states for program time reduction Jun 9, 2022 Issued
Array ( [id] => 18833578 [patent_doc_number] => 20230402105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => READ TECHNIQUES TO REDUCE READ ERRORS IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/837744 [patent_app_country] => US [patent_app_date] => 2022-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17837744 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/837744
Read techniques to reduce read errors in a memory device Jun 9, 2022 Issued
Array ( [id] => 19183580 [patent_doc_number] => 11990176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-21 [patent_title] => Pre-decoder circuity [patent_app_type] => utility [patent_app_number] => 17/831332 [patent_app_country] => US [patent_app_date] => 2022-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 10441 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17831332 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/831332
Pre-decoder circuity Jun 1, 2022 Issued
Array ( [id] => 17840489 [patent_doc_number] => 20220277795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-01 [patent_title] => MANAGING SUB-BLOCK ERASE OPERATIONS IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 17/745852 [patent_app_country] => US [patent_app_date] => 2022-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8720 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17745852 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/745852
Managing sub-block erase operations in a memory sub-system May 15, 2022 Issued
Array ( [id] => 19726902 [patent_doc_number] => 20250029653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => MEMORY AND ACCESS METHOD THEREFOR, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/714879 [patent_app_country] => US [patent_app_date] => 2022-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8720 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18714879 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/714879
MEMORY AND ACCESS METHOD THEREFOR, AND ELECTRONIC DEVICE May 11, 2022 Pending
Array ( [id] => 18918963 [patent_doc_number] => 11881250 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-23 [patent_title] => Write driver boost circuit for memory cells [patent_app_type] => utility [patent_app_number] => 17/738088 [patent_app_country] => US [patent_app_date] => 2022-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17738088 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/738088
Write driver boost circuit for memory cells May 5, 2022 Issued
Array ( [id] => 19523776 [patent_doc_number] => 12125514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Apparatuses and methods for access based refresh operations [patent_app_type] => utility [patent_app_number] => 17/731529 [patent_app_country] => US [patent_app_date] => 2022-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7218 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17731529 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/731529
Apparatuses and methods for access based refresh operations Apr 27, 2022 Issued
Array ( [id] => 18351831 [patent_doc_number] => 20230139942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => NEUROMORPHIC DEVICE AND METHOD OF DRIVING SAME [patent_app_type] => utility [patent_app_number] => 17/721037 [patent_app_country] => US [patent_app_date] => 2022-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8716 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17721037 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/721037
Neuromorphic device and method of driving same Apr 13, 2022 Issued
Array ( [id] => 18144753 [patent_doc_number] => 20230018605 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => MEMORY DEVICE AND METHOD OF OPERATING THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/720998 [patent_app_country] => US [patent_app_date] => 2022-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17720998 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/720998
Memory device and method of operating the memory device Apr 13, 2022 Issued
Array ( [id] => 20274685 [patent_doc_number] => 12444469 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => NAND flash memory device capable of selectively erasing one flash memory cell and operation method thereof [patent_app_type] => utility [patent_app_number] => 17/715809 [patent_app_country] => US [patent_app_date] => 2022-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2176 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17715809 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/715809
NAND flash memory device capable of selectively erasing one flash memory cell and operation method thereof Apr 6, 2022 Issued
Array ( [id] => 20274685 [patent_doc_number] => 12444469 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => NAND flash memory device capable of selectively erasing one flash memory cell and operation method thereof [patent_app_type] => utility [patent_app_number] => 17/715809 [patent_app_country] => US [patent_app_date] => 2022-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2176 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17715809 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/715809
NAND flash memory device capable of selectively erasing one flash memory cell and operation method thereof Apr 6, 2022 Issued
Array ( [id] => 19340316 [patent_doc_number] => 12050503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Storage device and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/711807 [patent_app_country] => US [patent_app_date] => 2022-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 8966 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17711807 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/711807
Storage device and operating method thereof Mar 31, 2022 Issued
Array ( [id] => 18679470 [patent_doc_number] => 20230317126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => Circuits and Methods of Detecting at Least Partial Breakdown of Canary Circuits [patent_app_type] => utility [patent_app_number] => 17/709076 [patent_app_country] => US [patent_app_date] => 2022-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12873 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17709076 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/709076
Circuits and methods of detecting at least partial breakdown of canary circuits Mar 29, 2022 Issued
Array ( [id] => 18431421 [patent_doc_number] => 11676648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Current steering in reading magnetic tunnel junction [patent_app_type] => utility [patent_app_number] => 17/703869 [patent_app_country] => US [patent_app_date] => 2022-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5884 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17703869 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/703869
Current steering in reading magnetic tunnel junction Mar 23, 2022 Issued
Array ( [id] => 18269892 [patent_doc_number] => 20230091134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/691198 [patent_app_country] => US [patent_app_date] => 2022-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16836 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17691198 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/691198
Semiconductor memory device Mar 9, 2022 Issued
Array ( [id] => 18379419 [patent_doc_number] => 20230154508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM RELATED TO WRITE LEVELING OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/688420 [patent_app_country] => US [patent_app_date] => 2022-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16075 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17688420 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/688420
Semiconductor device and semiconductor system related to write leveling operations Mar 6, 2022 Issued
Array ( [id] => 18266447 [patent_doc_number] => 20230087689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/685230 [patent_app_country] => US [patent_app_date] => 2022-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11443 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17685230 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/685230
Semiconductor memory device Mar 1, 2022 Issued
Menu