
Minh Dinh
Examiner (ID: 11249, Phone: (571)272-3802 , Office: P/2437 )
| Most Active Art Unit | 2432 |
| Art Unit(s) | 2132, 2432, 2437 |
| Total Applications | 969 |
| Issued Applications | 788 |
| Pending Applications | 26 |
| Abandoned Applications | 157 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6675924
[patent_doc_number] => 20030061527
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-27
[patent_title] => 'Method and apparatus for realigning bits on a parallel bus'
[patent_app_type] => new
[patent_app_number] => 09/964010
[patent_app_country] => US
[patent_app_date] => 2001-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[patent_no_of_words] => 8662
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0061/20030061527.pdf
[firstpage_image] =>[orig_patent_app_number] => 09964010
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/964010 | Method and apparatus for realigning bits on a parallel bus | Sep 25, 2001 | Abandoned |
Array
(
[id] => 6693842
[patent_doc_number] => 20030041274
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-27
[patent_title] => 'System architecture and method for synchronization of real-time clocks in a document processing system'
[patent_app_type] => new
[patent_app_number] => 09/938237
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[patent_app_date] => 2001-08-23
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[firstpage_image] =>[orig_patent_app_number] => 09938237
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/938237 | System architecture and method for synchronization of real-time clocks in a document processing system | Aug 22, 2001 | Issued |
Array
(
[id] => 6085627
[patent_doc_number] => 20020083316
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[patent_issue_date] => 2002-06-27
[patent_title] => 'Boot procedure for optical tranceiver nodes in a free-space optical communication network'
[patent_app_type] => new
[patent_app_number] => 09/935387
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[firstpage_image] =>[orig_patent_app_number] => 09935387
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/935387 | Boot procedure for optical tranceiver nodes in a free-space optical communication network | Aug 21, 2001 | Abandoned |
Array
(
[id] => 6871670
[patent_doc_number] => 20030084360
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-01
[patent_title] => 'Method of synchronizing and phase staggering two or more sampled data systems'
[patent_app_type] => new
[patent_app_number] => 09/934099
[patent_app_country] => US
[patent_app_date] => 2001-08-21
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[firstpage_image] =>[orig_patent_app_number] => 09934099
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/934099 | Method of synchronizing and phase staggering two or more sampled data systems | Aug 20, 2001 | Abandoned |
Array
(
[id] => 6580070
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[patent_issue_date] => 2002-04-11
[patent_title] => 'Variable clock configuration for switched op-amp circuits'
[patent_app_type] => new
[patent_app_number] => 09/932891
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[patent_app_date] => 2001-08-20
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[firstpage_image] =>[orig_patent_app_number] => 09932891
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/932891 | Variable clock configuration for switched op-amp circuits | Aug 19, 2001 | Issued |
Array
(
[id] => 490369
[patent_doc_number] => 07222244
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-05-22
[patent_title] => 'Semiconductor device including a prediction circuit to control a power status control circuit which controls the power status of a function circuit'
[patent_app_type] => utility
[patent_app_number] => 09/932099
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[pdf_file] => patents/07/222/07222244.pdf
[firstpage_image] =>[orig_patent_app_number] => 09932099
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/932099 | Semiconductor device including a prediction circuit to control a power status control circuit which controls the power status of a function circuit | Aug 19, 2001 | Issued |
Array
(
[id] => 757744
[patent_doc_number] => 07024549
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-04-04
[patent_title] => 'Disk drive having a protected partition configured to load an operating system for performing a user-selected function'
[patent_app_type] => utility
[patent_app_number] => 09/920575
[patent_app_country] => US
[patent_app_date] => 2001-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 2726
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[pdf_file] => patents/07/024/07024549.pdf
[firstpage_image] =>[orig_patent_app_number] => 09920575
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/920575 | Disk drive having a protected partition configured to load an operating system for performing a user-selected function | Jul 30, 2001 | Issued |
Array
(
[id] => 6385701
[patent_doc_number] => 20020120416
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-29
[patent_title] => 'Clock synchronization for network measurements'
[patent_app_type] => new
[patent_app_number] => 09/920138
[patent_app_country] => US
[patent_app_date] => 2001-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => publications/A1/0120/20020120416.pdf
[firstpage_image] =>[orig_patent_app_number] => 09920138
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/920138 | Clock synchronization with removal of clock skews through network measurements in derivation of a convext hull | Jul 30, 2001 | Issued |
Array
(
[id] => 626451
[patent_doc_number] => 07139922
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-11-21
[patent_title] => 'Powering down a computer in response to a thermal event'
[patent_app_type] => utility
[patent_app_number] => 09/918130
[patent_app_country] => US
[patent_app_date] => 2001-07-30
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[pdf_file] => patents/07/139/07139922.pdf
[firstpage_image] =>[orig_patent_app_number] => 09918130
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/918130 | Powering down a computer in response to a thermal event | Jul 29, 2001 | Issued |
Array
(
[id] => 6336272
[patent_doc_number] => 20020199124
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-26
[patent_title] => 'System and method for synchronizing data transfer across a clock domain boundary'
[patent_app_type] => new
[patent_app_number] => 09/887793
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/887793 | System and method for synchronizing data transfer across a clock domain boundary | Jun 21, 2001 | Abandoned |
Array
(
[id] => 960077
[patent_doc_number] => 06954863
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-10-11
[patent_title] => 'Local area network terminal adapted to be rebooted with local power supply interruption if remote power supply is not being received'
[patent_app_type] => utility
[patent_app_number] => 09/879046
[patent_app_country] => US
[patent_app_date] => 2001-06-13
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/879046 | Local area network terminal adapted to be rebooted with local power supply interruption if remote power supply is not being received | Jun 12, 2001 | Issued |
Array
(
[id] => 6035672
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[patent_country] => US
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[patent_issue_date] => 2002-02-14
[patent_title] => 'Method for protecting a digital communications system'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/879864 | Method for protecting a digital communications system | Jun 11, 2001 | Abandoned |
Array
(
[id] => 904920
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[patent_title] => 'Embedded processor with watchdog timer for programmable logic'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/880734 | Embedded processor with watchdog timer for programmable logic | Jun 11, 2001 | Issued |
Array
(
[id] => 6485508
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[patent_title] => 'Timing multiple events with a single timer'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/835034 | Timing multiple events with a single timer | Apr 12, 2001 | Abandoned |
Array
(
[id] => 1149822
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[patent_title] => 'Microcomputer operable with external and internal clock signals'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/826347 | Microcomputer operable with external and internal clock signals | Apr 4, 2001 | Issued |
Array
(
[id] => 5910634
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[patent_issue_date] => 2002-10-03
[patent_title] => 'DS-3 desynchronizer'
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[firstpage_image] =>[orig_patent_app_number] => 09825102
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/825102 | DS3 Desynchronizer with a module for providing uniformly gapped data signal to a PLL module for providing a smooth output data signal | Apr 2, 2001 | Issued |
Array
(
[id] => 6881035
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[patent_title] => 'Clock generating device'
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Array
(
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Array
(
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Array
(
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[patent_title] => 'Safe shutdown device for an uninterruptible power supply (UPS) system and method for safely shuting down a UPS system'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/820665 | Safe shutdown device for an uninterruptible power supply (UPS) system and method for safely shuting down a UPS system | Mar 29, 2001 | Abandoned |