Search

Minh N. Trinh

Examiner (ID: 3914)

Most Active Art Unit
3729
Art Unit(s)
3729
Total Applications
2605
Issued Applications
2088
Pending Applications
154
Abandoned Applications
393

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17589778 [patent_doc_number] => 11328051 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-10 [patent_title] => System, methods, and devices responsive to audio signatures [patent_app_type] => utility [patent_app_number] => 16/526447 [patent_app_country] => US [patent_app_date] => 2019-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8879 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16526447 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/526447
System, methods, and devices responsive to audio signatures Jul 29, 2019 Issued
Array ( [id] => 16584867 [patent_doc_number] => 20210019269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => OPTIMIZING TIME-DEPENDENT SIMULATIONS OF QUANTUM COMPUTING ARCHITECTURES [patent_app_type] => utility [patent_app_number] => 16/513215 [patent_app_country] => US [patent_app_date] => 2019-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10675 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16513215 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/513215
Optimizing time-dependent simulations of quantum computing architectures Jul 15, 2019 Issued
Array ( [id] => 17379989 [patent_doc_number] => 11238005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => SFF-TA-100X based multi-mode protocols solid state devices [patent_app_type] => utility [patent_app_number] => 16/509342 [patent_app_country] => US [patent_app_date] => 2019-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10639 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16509342 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/509342
SFF-TA-100X based multi-mode protocols solid state devices Jul 10, 2019 Issued
Array ( [id] => 16592492 [patent_doc_number] => 10901754 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Systems and methods for distributed control [patent_app_type] => utility [patent_app_number] => 16/508105 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 12410 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16508105 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/508105
Systems and methods for distributed control Jul 9, 2019 Issued
Array ( [id] => 15500737 [patent_doc_number] => 20200050557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => Apparatus for Data Processing, Artificial Intelligence Chip and Electronic Device [patent_app_type] => utility [patent_app_number] => 16/506151 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7760 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506151 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506151
Apparatus for data processing, artificial intelligence chip and electronic device Jul 8, 2019 Issued
Array ( [id] => 16737759 [patent_doc_number] => 10963411 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-03-30 [patent_title] => Integrating rows of input/output blocks with memory controllers in a columnar programmable fabric archeture [patent_app_type] => utility [patent_app_number] => 16/502141 [patent_app_country] => US [patent_app_date] => 2019-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 15376 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16502141 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/502141
Integrating rows of input/output blocks with memory controllers in a columnar programmable fabric archeture Jul 2, 2019 Issued
Array ( [id] => 17360759 [patent_doc_number] => 20220021555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-20 [patent_title] => DECENTRALISED COMMUNICATION SYSTEM AND CORRESPONDING CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 17/413336 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8124 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17413336 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/413336
DECENTRALISED COMMUNICATION SYSTEM AND CORRESPONDING CONTROL METHOD Jun 20, 2019 Abandoned
Array ( [id] => 15854981 [patent_doc_number] => 10642776 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Low-pincount high-bandwidth memory and memory bus [patent_app_type] => utility [patent_app_number] => 16/445495 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 84 [patent_figures_cnt] => 84 [patent_no_of_words] => 16524 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16445495 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/445495
Low-pincount high-bandwidth memory and memory bus Jun 18, 2019 Issued
Array ( [id] => 17507582 [patent_doc_number] => 20220100685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => METHOD AND APPARATUS FOR OPTIMIZING INPUT LATENCY IN A WIRELESS HUMAN INTERFACE DEVICE SYSTEM [patent_app_type] => utility [patent_app_number] => 17/619469 [patent_app_country] => US [patent_app_date] => 2019-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5981 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17619469 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/619469
Method and apparatus for optimizing input latency in a wireless human interface device system Jun 17, 2019 Issued
Array ( [id] => 17744350 [patent_doc_number] => 11392417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-19 [patent_title] => Ultraconverged systems having multiple availability zones [patent_app_type] => utility [patent_app_number] => 16/437721 [patent_app_country] => US [patent_app_date] => 2019-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 3712 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16437721 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/437721
Ultraconverged systems having multiple availability zones Jun 10, 2019 Issued
Array ( [id] => 16979980 [patent_doc_number] => 20210224217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => A Communication Apparatus [patent_app_type] => utility [patent_app_number] => 16/972214 [patent_app_country] => US [patent_app_date] => 2019-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6424 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16972214 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/972214
Communication apparatus capable of implementing a selected communication protocol Jun 6, 2019 Issued
Array ( [id] => 14872681 [patent_doc_number] => 20190286582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => METHOD FOR PROCESSING CLIENT REQUESTS IN A CLUSTER SYSTEM, A METHOD AND AN APPARATUS FOR PROCESSING I/O ACCORDING TO THE CLIENT REQUESTS [patent_app_type] => utility [patent_app_number] => 16/427799 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12261 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16427799 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/427799
METHOD FOR PROCESSING CLIENT REQUESTS IN A CLUSTER SYSTEM, A METHOD AND AN APPARATUS FOR PROCESSING I/O ACCORDING TO THE CLIENT REQUESTS May 30, 2019 Abandoned
Array ( [id] => 16454699 [patent_doc_number] => 20200364125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => METHOD AND SYSTEM FOR COMMUNICATION CHANNELS TO MANAGEMENT CONTROLLER [patent_app_type] => utility [patent_app_number] => 16/411994 [patent_app_country] => US [patent_app_date] => 2019-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6214 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411994 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/411994
Method and system for communication channels to management controller May 13, 2019 Issued
Array ( [id] => 16393037 [patent_doc_number] => 20200333978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => IDENTIFYING PERFORMANCE IMPACT EVENTS IN DATA STORAGE EQUIPMENT BASED ON QUEUE DEPTH METRICS [patent_app_type] => utility [patent_app_number] => 16/390534 [patent_app_country] => US [patent_app_date] => 2019-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8548 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16390534 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/390534
Identifying performance impact events in data storage equipment based on queue depth metrics Apr 21, 2019 Issued
Array ( [id] => 16393236 [patent_doc_number] => 20200334177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => HOST SYSTEM DIRECTLY CONNECTED TO INTERNAL SWITCHING FABRIC OF STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 16/389383 [patent_app_country] => US [patent_app_date] => 2019-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18136 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16389383 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/389383
Host system directly connected to internal switching fabric of storage system Apr 18, 2019 Issued
Array ( [id] => 14935377 [patent_doc_number] => 20190303326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => ARBITRATING PORTIONS OF TRANSACTIONS OVER VIRTUAL CHANNELS ASSOCIATED WITH AN INTERCONNECT [patent_app_type] => utility [patent_app_number] => 16/368358 [patent_app_country] => US [patent_app_date] => 2019-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14558 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16368358 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/368358
Arbitrating portions of transactions over virtual channels associated with an interconnect Mar 27, 2019 Issued
Array ( [id] => 14935375 [patent_doc_number] => 20190303325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => ARBITRATING PORTIONS OF TRANSACTIONS OVER VIRTUAL CHANNELS ASSOCIATED WITH AN INTERCONNECT [patent_app_type] => utility [patent_app_number] => 16/368287 [patent_app_country] => US [patent_app_date] => 2019-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14558 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -43 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16368287 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/368287
Arbitrating portions of transactions over virtual channels associated with an interconnect Mar 27, 2019 Issued
Array ( [id] => 14657817 [patent_doc_number] => 20190236037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-01 [patent_title] => LOW PIN-COUNT ARCHITECTURE WITH PRIORITIZED MESSAGE ARBITRATION AND DELIVERY [patent_app_type] => utility [patent_app_number] => 16/366789 [patent_app_country] => US [patent_app_date] => 2019-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8367 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16366789 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/366789
Low pin-count architecture with prioritized message arbitration and delivery Mar 26, 2019 Issued
Array ( [id] => 17283158 [patent_doc_number] => 11200187 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Configuring programmatic interfaces of bus bridges in computer systems [patent_app_type] => utility [patent_app_number] => 16/366070 [patent_app_country] => US [patent_app_date] => 2019-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3422 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16366070 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/366070
Configuring programmatic interfaces of bus bridges in computer systems Mar 26, 2019 Issued
Array ( [id] => 14585625 [patent_doc_number] => 20190220421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => VENDOR-SPECIFIC PERIPHERAL DEVICE CLASS IDENTIFIERS [patent_app_type] => utility [patent_app_number] => 16/360427 [patent_app_country] => US [patent_app_date] => 2019-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8747 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16360427 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/360427
Vendor-specific peripheral device class identifiers Mar 20, 2019 Issued
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