
Minh N. Trinh
Examiner (ID: 3914)
| Most Active Art Unit | 3729 |
| Art Unit(s) | 3729 |
| Total Applications | 2605 |
| Issued Applications | 2088 |
| Pending Applications | 154 |
| Abandoned Applications | 393 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 14811021
[patent_doc_number] => 20190272120
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-09-05
[patent_title] => MEMORY ARRAY ARCHITECTURES FOR MEMORY QUEUES
[patent_app_type] => utility
[patent_app_number] => 16/289841
[patent_app_country] => US
[patent_app_date] => 2019-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13262
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16289841
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/289841 | Memory array architectures for memory queues | Feb 28, 2019 | Issued |
Array
(
[id] => 14472535
[patent_doc_number] => 20190187911
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-06-20
[patent_title] => DISPERSED BLOOM FILTER FOR DETERMINING PRESENCE OF AN OBJECT
[patent_app_type] => utility
[patent_app_number] => 16/284248
[patent_app_country] => US
[patent_app_date] => 2019-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9151
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 240
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16284248
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/284248 | DISPERSED BLOOM FILTER FOR DETERMINING PRESENCE OF AN OBJECT | Feb 24, 2019 | Abandoned |
Array
(
[id] => 15758001
[patent_doc_number] => 10621114
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-04-14
[patent_title] => Standardized interface for storage using an input/output (I/O) adapter device
[patent_app_type] => utility
[patent_app_number] => 16/258375
[patent_app_country] => US
[patent_app_date] => 2019-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 16859
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16258375
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/258375 | Standardized interface for storage using an input/output (I/O) adapter device | Jan 24, 2019 | Issued |
Array
(
[id] => 16801334
[patent_doc_number] => 10996267
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-05-04
[patent_title] => Time interleaved scan system
[patent_app_type] => utility
[patent_app_number] => 16/255214
[patent_app_country] => US
[patent_app_date] => 2019-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 4565
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16255214
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/255214 | Time interleaved scan system | Jan 22, 2019 | Issued |
Array
(
[id] => 16644392
[patent_doc_number] => 10922249
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-02-16
[patent_title] => Input/output control code filter
[patent_app_type] => utility
[patent_app_number] => 16/248451
[patent_app_country] => US
[patent_app_date] => 2019-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7544
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16248451
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/248451 | Input/output control code filter | Jan 14, 2019 | Issued |
Array
(
[id] => 14657819
[patent_doc_number] => 20190236038
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-01
[patent_title] => BUFFERED INTERCONNECT FOR HIGHLY SCALABLE ON-DIE FABRIC
[patent_app_type] => utility
[patent_app_number] => 16/227364
[patent_app_country] => US
[patent_app_date] => 2018-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13536
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16227364
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/227364 | BUFFERED INTERCONNECT FOR HIGHLY SCALABLE ON-DIE FABRIC | Dec 19, 2018 | Abandoned |
Array
(
[id] => 15183031
[patent_doc_number] => 20190362107
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-28
[patent_title] => ADVANCED PERIPHERAL BUS BASED INTER-INTEGRATED CIRCUIT COMMUNICATION DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/479401
[patent_app_country] => US
[patent_app_date] => 2018-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3112
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16479401
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/479401 | ADVANCED PERIPHERAL BUS BASED INTER-INTEGRATED CIRCUIT COMMUNICATION DEVICE | Dec 18, 2018 | Abandoned |
Array
(
[id] => 16659302
[patent_doc_number] => 20210055939
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-25
[patent_title] => MASTER-SLAVE CONFIGURATION COMMUNICATION PROTOCOL, METHOD FOR IMPROVING COMPATIBILITY, AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/042896
[patent_app_country] => US
[patent_app_date] => 2018-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4610
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17042896
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/042896 | Master-slave configuration communication protocol, method for improving compatibility, and electronic device | Dec 10, 2018 | Issued |
Array
(
[id] => 14189155
[patent_doc_number] => 20190114283
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-04-18
[patent_title] => ZERO COPY HOST INTERFACE IN A SCALABLE INPUT/OUTPUT (I/O) VIRTUALIZATION (S-IOV) ARCHITECTURE
[patent_app_type] => utility
[patent_app_number] => 16/211924
[patent_app_country] => US
[patent_app_date] => 2018-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14905
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16211924
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/211924 | Zero copy host interface in a scalable input/output (I/O) virtualization (S-IOV) architecture | Dec 5, 2018 | Issued |
Array
(
[id] => 17143888
[patent_doc_number] => 20210311901
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-07
[patent_title] => DATA AND POWER SUPPLY PORTS IN GUIDERAILS
[patent_app_type] => utility
[patent_app_number] => 17/274544
[patent_app_country] => US
[patent_app_date] => 2018-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3721
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17274544
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/274544 | DATA AND POWER SUPPLY PORTS IN GUIDERAILS | Nov 27, 2018 | Abandoned |
Array
(
[id] => 16462901
[patent_doc_number] => 10846249
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-11-24
[patent_title] => Bi-directional asynchronous I/O abstraction based upon pair of tightly coupled reactive streams flows
[patent_app_type] => utility
[patent_app_number] => 16/165809
[patent_app_country] => US
[patent_app_date] => 2018-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 8689
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 216
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16165809
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/165809 | Bi-directional asynchronous I/O abstraction based upon pair of tightly coupled reactive streams flows | Oct 18, 2018 | Issued |
Array
(
[id] => 14411531
[patent_doc_number] => 20190171609
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-06-06
[patent_title] => NON-DESTRUCTIVE OUTSIDE DEVICE ALERTS FOR MULTI-LANE I3C
[patent_app_type] => utility
[patent_app_number] => 16/162536
[patent_app_country] => US
[patent_app_date] => 2018-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15172
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16162536
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/162536 | NON-DESTRUCTIVE OUTSIDE DEVICE ALERTS FOR MULTI-LANE I3C | Oct 16, 2018 | Abandoned |
Array
(
[id] => 16879983
[patent_doc_number] => 11030132
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-06-08
[patent_title] => Synchronous memory bus access to storage media
[patent_app_type] => utility
[patent_app_number] => 16/157900
[patent_app_country] => US
[patent_app_date] => 2018-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 13475
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16157900
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/157900 | Synchronous memory bus access to storage media | Oct 10, 2018 | Issued |
Array
(
[id] => 14968077
[patent_doc_number] => 20190311517
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-10
[patent_title] => DATA PROCESSING SYSTEM INCLUDING AN EXPANDED MEMORY CARD
[patent_app_type] => utility
[patent_app_number] => 16/151602
[patent_app_country] => US
[patent_app_date] => 2018-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5999
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16151602
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/151602 | DATA PROCESSING SYSTEM INCLUDING AN EXPANDED MEMORY CARD | Oct 3, 2018 | Abandoned |
Array
(
[id] => 13845325
[patent_doc_number] => 20190026147
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-01-24
[patent_title] => AVOIDING INDEX CONTENTION WITH DISTRIBUTED TASK QUEUES IN A DISTRIBUTED STORAGE SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/139219
[patent_app_country] => US
[patent_app_date] => 2018-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6875
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16139219
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/139219 | AVOIDING INDEX CONTENTION WITH DISTRIBUTED TASK QUEUES IN A DISTRIBUTED STORAGE SYSTEM | Sep 23, 2018 | Abandoned |
Array
(
[id] => 17138426
[patent_doc_number] => 11140001
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-10-05
[patent_title] => Method for providing data packets from a CAN bus, control device and system having a CAN bus
[patent_app_type] => utility
[patent_app_number] => 16/648944
[patent_app_country] => US
[patent_app_date] => 2018-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 5443
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16648944
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/648944 | Method for providing data packets from a CAN bus, control device and system having a CAN bus | Sep 20, 2018 | Issued |
Array
(
[id] => 13782383
[patent_doc_number] => 20190004730
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-01-03
[patent_title] => USING INDEX STRUCTURE TO GUIDE LOAD BALANCING IN A DISTRIBUTED STORAGE SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/122949
[patent_app_country] => US
[patent_app_date] => 2018-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7179
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122949
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/122949 | USING INDEX STRUCTURE TO GUIDE LOAD BALANCING IN A DISTRIBUTED STORAGE SYSTEM | Sep 5, 2018 | Abandoned |
Array
(
[id] => 14281905
[patent_doc_number] => 20190138237
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-09
[patent_title] => Uniform System Wide Addressing for a Computing System
[patent_app_type] => utility
[patent_app_number] => 16/114111
[patent_app_country] => US
[patent_app_date] => 2018-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8250
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114111
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/114111 | Uniform system wide addressing for a computing system | Aug 26, 2018 | Issued |
Array
(
[id] => 16818561
[patent_doc_number] => 11003387
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-05-11
[patent_title] => Combined data and control for multi-die flash
[patent_app_type] => utility
[patent_app_number] => 16/053695
[patent_app_country] => US
[patent_app_date] => 2018-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6403
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16053695
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/053695 | Combined data and control for multi-die flash | Aug 1, 2018 | Issued |
Array
(
[id] => 17651410
[patent_doc_number] => 11354137
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-06-07
[patent_title] => Modular computing component information transmission
[patent_app_type] => utility
[patent_app_number] => 17/048120
[patent_app_country] => US
[patent_app_date] => 2018-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6019
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17048120
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/048120 | Modular computing component information transmission | Jul 9, 2018 | Issued |