Search

Minh N. Trinh

Examiner (ID: 3914)

Most Active Art Unit
3729
Art Unit(s)
3729
Total Applications
2605
Issued Applications
2088
Pending Applications
154
Abandoned Applications
393

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18694920 [patent_doc_number] => 20230325338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => PROTOCOL INDICATOR FOR DATA TRANSFER [patent_app_type] => utility [patent_app_number] => 17/714446 [patent_app_country] => US [patent_app_date] => 2022-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5205 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17714446 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/714446
Protocol indicator for data transfer Apr 5, 2022 Issued
Array ( [id] => 17736737 [patent_doc_number] => 20220222196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => PCI EXPRESS CHAIN DESCRIPTORS [patent_app_type] => utility [patent_app_number] => 17/709132 [patent_app_country] => US [patent_app_date] => 2022-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14408 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17709132 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/709132
PCI EXPRESS CHAIN DESCRIPTORS Mar 29, 2022 Abandoned
Array ( [id] => 19152597 [patent_doc_number] => 11977508 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Serial data communication with in-frame response [patent_app_type] => utility [patent_app_number] => 17/656328 [patent_app_country] => US [patent_app_date] => 2022-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 5102 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17656328 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/656328
Serial data communication with in-frame response Mar 23, 2022 Issued
Array ( [id] => 17869297 [patent_doc_number] => 20220292034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => BUS SYSTEM WITH ADDRESSABLE UNITS AND METHOD FOR ADDRESSING SAID UNITS [patent_app_type] => utility [patent_app_number] => 17/687878 [patent_app_country] => US [patent_app_date] => 2022-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3775 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17687878 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/687878
BUS SYSTEM WITH ADDRESSABLE UNITS AND METHOD FOR ADDRESSING SAID UNITS Mar 6, 2022 Abandoned
Array ( [id] => 19061704 [patent_doc_number] => 11940939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Encoding byte information on a data bus with separate code [patent_app_type] => utility [patent_app_number] => 17/688607 [patent_app_country] => US [patent_app_date] => 2022-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10052 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17688607 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/688607
Encoding byte information on a data bus with separate code Mar 6, 2022 Issued
Array ( [id] => 18584821 [patent_doc_number] => 20230267085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => ONE-WIRE BIDIRECTIONAL BUS SIGNALING WITH MANCHESTER ENCODING [patent_app_type] => utility [patent_app_number] => 17/677731 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16565 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17677731 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/677731
One-wire bidirectional bus signaling with manchester encoding Feb 21, 2022 Issued
Array ( [id] => 19458968 [patent_doc_number] => 12099457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Controller for managing multiple types of memory [patent_app_type] => utility [patent_app_number] => 17/673731 [patent_app_country] => US [patent_app_date] => 2022-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10424 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17673731 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/673731
Controller for managing multiple types of memory Feb 15, 2022 Issued
Array ( [id] => 18949667 [patent_doc_number] => 11892960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Multi-KVM multi-client information handling system support [patent_app_type] => utility [patent_app_number] => 17/667079 [patent_app_country] => US [patent_app_date] => 2022-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4043 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17667079 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/667079
Multi-KVM multi-client information handling system support Feb 7, 2022 Issued
Array ( [id] => 19885611 [patent_doc_number] => 12271324 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => Configuration data caching [patent_app_type] => utility [patent_app_number] => 17/591387 [patent_app_country] => US [patent_app_date] => 2022-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 4189 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17591387 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/591387
Configuration data caching Feb 1, 2022 Issued
Array ( [id] => 18592142 [patent_doc_number] => 11741040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => SFF-TA-100X based multi-mode protocols solid state devices [patent_app_type] => utility [patent_app_number] => 17/589514 [patent_app_country] => US [patent_app_date] => 2022-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10653 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17589514 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/589514
SFF-TA-100X based multi-mode protocols solid state devices Jan 30, 2022 Issued
Array ( [id] => 18539516 [patent_doc_number] => 20230244624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => METHODS AND APPARATUS TO PREFORM INTER-INTEGRATED CIRCUIT ADDRESS MODIFICATION [patent_app_type] => utility [patent_app_number] => 17/587695 [patent_app_country] => US [patent_app_date] => 2022-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11826 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17587695 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/587695
Methods and apparatus to preform inter-integrated circuit address modification Jan 27, 2022 Issued
Array ( [id] => 18224930 [patent_doc_number] => 20230063924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => PRIMARY CHECK SYSTEM [patent_app_type] => utility [patent_app_number] => 17/583480 [patent_app_country] => US [patent_app_date] => 2022-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3223 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17583480 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/583480
Primary check system Jan 24, 2022 Issued
Array ( [id] => 18981982 [patent_doc_number] => 11907155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => Bus system connecting slave devices with single-wire data access communication [patent_app_type] => utility [patent_app_number] => 17/574090 [patent_app_country] => US [patent_app_date] => 2022-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8738 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17574090 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/574090
Bus system connecting slave devices with single-wire data access communication Jan 11, 2022 Issued
Array ( [id] => 18561695 [patent_doc_number] => 11726938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Communications for field programmable gate array device [patent_app_type] => utility [patent_app_number] => 17/560524 [patent_app_country] => US [patent_app_date] => 2021-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 15317 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560524 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560524
Communications for field programmable gate array device Dec 22, 2021 Issued
Array ( [id] => 17535523 [patent_doc_number] => 20220114132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => Data Switch Chip and Server [patent_app_type] => utility [patent_app_number] => 17/561019 [patent_app_country] => US [patent_app_date] => 2021-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7214 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17561019 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/561019
Transmission device and communication system for artificial intelligence chips Dec 22, 2021 Issued
Array ( [id] => 17763530 [patent_doc_number] => 20220237142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => DATA TRANSMISSION METHOD AND DEVICE [patent_app_type] => utility [patent_app_number] => 17/558316 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3947 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558316 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/558316
Data transmission method and device connecting a FPGA with an ARM processor Dec 20, 2021 Issued
Array ( [id] => 18703378 [patent_doc_number] => 11789889 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Mechanism for device interoperability of switches in computer buses [patent_app_type] => utility [patent_app_number] => 17/557837 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 16078 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17557837 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/557837
Mechanism for device interoperability of switches in computer buses Dec 20, 2021 Issued
Array ( [id] => 17535518 [patent_doc_number] => 20220114127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => SYSTEM AND METHOD TO SELECTIVELY REDUCE USB-3 INTERFERENCE WITH WIRELESS COMMUNICATION DEVICES [patent_app_type] => utility [patent_app_number] => 17/556315 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5660 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17556315 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/556315
System and method to selectively reduce USB-3 interference with wireless communication devices Dec 19, 2021 Issued
Array ( [id] => 19251157 [patent_doc_number] => 20240202147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => MESSAGE CONVERSION AND MESSAGE PASSTHROUGH BETWEEN DEVICES AND A PROCESSOR IN A MULTI-PANEL COMPUTING DEVICE [patent_app_type] => utility [patent_app_number] => 18/288985 [patent_app_country] => US [patent_app_date] => 2021-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27140 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18288985 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/288985
MESSAGE CONVERSION AND MESSAGE PASSTHROUGH BETWEEN DEVICES AND A PROCESSOR IN A MULTI-PANEL COMPUTING DEVICE Dec 15, 2021 Pending
Array ( [id] => 18493463 [patent_doc_number] => 11698881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-11 [patent_title] => Transferring data between solid state drives (SSDs) via a connection between the SSDs [patent_app_type] => utility [patent_app_number] => 17/549608 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10403 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17549608 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/549608
Transferring data between solid state drives (SSDs) via a connection between the SSDs Dec 12, 2021 Issued
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