
Minh T. Nguyen
Examiner (ID: 11202)
| Most Active Art Unit | 2816 |
| Art Unit(s) | 3991, 2816, 3992 |
| Total Applications | 873 |
| Issued Applications | 770 |
| Pending Applications | 36 |
| Abandoned Applications | 71 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7445560
[patent_doc_number] => 20040196070
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-07
[patent_title] => 'Method of and apparatus for detecting difference between the frequencies, and phase locked loop circuit'
[patent_app_type] => new
[patent_app_number] => 10/828181
[patent_app_country] => US
[patent_app_date] => 2004-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5225
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[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0196/20040196070.pdf
[firstpage_image] =>[orig_patent_app_number] => 10828181
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/828181 | Method of and apparatus for detecting difference between the frequencies, and phase locked loop circuit | Apr 20, 2004 | Issued |
Array
(
[id] => 712689
[patent_doc_number] => 07057418
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-06-06
[patent_title] => 'High speed linear half-rate phase detector'
[patent_app_type] => utility
[patent_app_number] => 10/823060
[patent_app_country] => US
[patent_app_date] => 2004-04-13
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[firstpage_image] =>[orig_patent_app_number] => 10823060
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/823060 | High speed linear half-rate phase detector | Apr 12, 2004 | Issued |
Array
(
[id] => 762624
[patent_doc_number] => 07012470
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[patent_kind] => B2
[patent_issue_date] => 2006-03-14
[patent_title] => 'Communication semiconductor integrated circuit with frequency adjustment/control circuit'
[patent_app_type] => utility
[patent_app_number] => 10/807158
[patent_app_country] => US
[patent_app_date] => 2004-03-24
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 10807158
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/807158 | Communication semiconductor integrated circuit with frequency adjustment/control circuit | Mar 23, 2004 | Issued |
Array
(
[id] => 938780
[patent_doc_number] => 06972609
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-12-06
[patent_title] => 'Semiconductor integrated circuit device with a plurality of internal circuits operable in synchronism with internal clock'
[patent_app_type] => utility
[patent_app_number] => 10/803983
[patent_app_country] => US
[patent_app_date] => 2004-03-19
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/972/06972609.pdf
[firstpage_image] =>[orig_patent_app_number] => 10803983
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/803983 | Semiconductor integrated circuit device with a plurality of internal circuits operable in synchronism with internal clock | Mar 18, 2004 | Issued |
Array
(
[id] => 7155576
[patent_doc_number] => 20050083098
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-21
[patent_title] => 'Clock shift circuit for gradual frequency change'
[patent_app_type] => utility
[patent_app_number] => 10/796005
[patent_app_country] => US
[patent_app_date] => 2004-03-10
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[pdf_file] => publications/A1/0083/20050083098.pdf
[firstpage_image] =>[orig_patent_app_number] => 10796005
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/796005 | Clock shift circuit for gradual frequency change | Mar 9, 2004 | Issued |
Array
(
[id] => 656209
[patent_doc_number] => 07109763
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[patent_kind] => B1
[patent_issue_date] => 2006-09-19
[patent_title] => 'Phase locked loop operable over a wide frequency range'
[patent_app_type] => utility
[patent_app_number] => 10/796873
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[patent_app_date] => 2004-03-08
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[firstpage_image] =>[orig_patent_app_number] => 10796873
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/796873 | Phase locked loop operable over a wide frequency range | Mar 7, 2004 | Issued |
Array
(
[id] => 760071
[patent_doc_number] => 07015739
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-03-21
[patent_title] => 'Integrated circuit devices having duty cycle correction circuits that receive control signals over first and second separate paths and methods of operating the same'
[patent_app_type] => utility
[patent_app_number] => 10/793001
[patent_app_country] => US
[patent_app_date] => 2004-03-04
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[pdf_file] => patents/07/015/07015739.pdf
[firstpage_image] =>[orig_patent_app_number] => 10793001
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/793001 | Integrated circuit devices having duty cycle correction circuits that receive control signals over first and second separate paths and methods of operating the same | Mar 3, 2004 | Issued |
Array
(
[id] => 7339717
[patent_doc_number] => 20040246032
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-09
[patent_title] => 'Clock shaping device and electronic instrument using the same'
[patent_app_type] => new
[patent_app_number] => 10/791652
[patent_app_country] => US
[patent_app_date] => 2004-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => publications/A1/0246/20040246032.pdf
[firstpage_image] =>[orig_patent_app_number] => 10791652
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/791652 | Clock shaping device and electronic instrument using the same | Mar 1, 2004 | Issued |
Array
(
[id] => 7619577
[patent_doc_number] => 06943609
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-09-13
[patent_title] => 'Stratum clock state machine multiplexing switching'
[patent_app_type] => utility
[patent_app_number] => 10/782441
[patent_app_country] => US
[patent_app_date] => 2004-02-19
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[pdf_file] => patents/06/943/06943609.pdf
[firstpage_image] =>[orig_patent_app_number] => 10782441
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/782441 | Stratum clock state machine multiplexing switching | Feb 18, 2004 | Issued |
Array
(
[id] => 1035475
[patent_doc_number] => 06876242
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-04-05
[patent_title] => 'Synchronization module'
[patent_app_type] => utility
[patent_app_number] => 10/782313
[patent_app_country] => US
[patent_app_date] => 2004-02-19
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/876/06876242.pdf
[firstpage_image] =>[orig_patent_app_number] => 10782313
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/782313 | Synchronization module | Feb 18, 2004 | Issued |
Array
(
[id] => 7377309
[patent_doc_number] => 20040178856
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[patent_kind] => A1
[patent_issue_date] => 2004-09-16
[patent_title] => 'Continuous-phase oscillator with ultra-fine frequency resolution'
[patent_app_type] => new
[patent_app_number] => 10/779979
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[patent_app_date] => 2004-02-17
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[pdf_file] => publications/A1/0178/20040178856.pdf
[firstpage_image] =>[orig_patent_app_number] => 10779979
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/779979 | Continuous-phase oscillator with ultra-fine frequency resolution | Feb 16, 2004 | Abandoned |
Array
(
[id] => 959142
[patent_doc_number] => 06954089
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-10-11
[patent_title] => 'Frequency converter having low supply voltage'
[patent_app_type] => utility
[patent_app_number] => 10/776199
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/776199 | Frequency converter having low supply voltage | Feb 11, 2004 | Issued |
Array
(
[id] => 7284001
[patent_doc_number] => 20040145392
[patent_country] => US
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[patent_issue_date] => 2004-07-29
[patent_title] => 'Driver circuit'
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[firstpage_image] =>[orig_patent_app_number] => 10759135
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/759135 | Driver circuit | Jan 19, 2004 | Abandoned |
Array
(
[id] => 944453
[patent_doc_number] => 06967507
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[patent_issue_date] => 2005-11-22
[patent_title] => 'Dual edge count programmable frequency divider'
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[pdf_file] => patents/06/967/06967507.pdf
[firstpage_image] =>[orig_patent_app_number] => 10758826
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/758826 | Dual edge count programmable frequency divider | Jan 14, 2004 | Issued |
Array
(
[id] => 7101908
[patent_doc_number] => 20050104634
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[patent_kind] => A1
[patent_issue_date] => 2005-05-19
[patent_title] => 'Frequency divider, PLL circuit and semiconductor integrated circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/759865 | Frequency divider, PLL circuit and semiconductor integrated circuit | Jan 14, 2004 | Abandoned |
Array
(
[id] => 643183
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[patent_issue_date] => 2006-10-17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/756838 | Method and device for producing delayed signals | Jan 12, 2004 | Issued |
Array
(
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[patent_issue_date] => 2005-07-14
[patent_title] => 'Method and system for pulse waveform variable edge control'
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Array
(
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/743955 | Pulse clock/signal delay apparatus and method | Dec 22, 2003 | Abandoned |