Search

Mohamed Ibrahim

Examiner (ID: 13797, Phone: (571)270-1132 , Office: P/2444 )

Most Active Art Unit
2444
Art Unit(s)
2144, 2444
Total Applications
779
Issued Applications
623
Pending Applications
54
Abandoned Applications
117

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20096329 [patent_doc_number] => 20250226265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => CORRECTING OF DESIGN AND MASK SHAPE POSITION DUE TO DIE AND WAFER DISTORTION FOR BONDING [patent_app_type] => utility [patent_app_number] => 18/404489 [patent_app_country] => US [patent_app_date] => 2024-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18404489 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/404489
CORRECTING OF DESIGN AND MASK SHAPE POSITION DUE TO DIE AND WAFER DISTORTION FOR BONDING Jan 3, 2024 Pending
Array ( [id] => 20021745 [patent_doc_number] => 20250159967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/510011 [patent_app_country] => US [patent_app_date] => 2023-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18510011 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/510011
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Nov 14, 2023 Pending
Array ( [id] => 20021741 [patent_doc_number] => 20250159963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => REDUCED GATE EDGE CAPACITANCE [patent_app_type] => utility [patent_app_number] => 18/508541 [patent_app_country] => US [patent_app_date] => 2023-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2173 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18508541 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/508541
REDUCED GATE EDGE CAPACITANCE Nov 13, 2023 Pending
Array ( [id] => 19392953 [patent_doc_number] => 20240282823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => POWER SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/508706 [patent_app_country] => US [patent_app_date] => 2023-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5271 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18508706 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/508706
POWER SEMICONDUCTOR DEVICE Nov 13, 2023 Pending
Array ( [id] => 19146294 [patent_doc_number] => 20240145323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => ELECTRICAL MODULE AND METHOD OF MANUFACTURING AN ELECTRICAL MODULE [patent_app_type] => utility [patent_app_number] => 18/484304 [patent_app_country] => US [patent_app_date] => 2023-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6020 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18484304 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/484304
ELECTRICAL MODULE AND METHOD OF MANUFACTURING AN ELECTRICAL MODULE Oct 9, 2023 Pending
Array ( [id] => 19071471 [patent_doc_number] => 20240105897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => DISPLAY DEVICE, METHOD OF MANUFACTURING THE SAME AND TILED DISPLAY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/356436 [patent_app_country] => US [patent_app_date] => 2023-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20614 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18356436 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/356436
DISPLAY DEVICE, METHOD OF MANUFACTURING THE SAME AND TILED DISPLAY DEVICE INCLUDING THE SAME Jul 20, 2023 Pending
Array ( [id] => 19728668 [patent_doc_number] => 20250031419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => Stacked Multi-Gate Device With Reduced Contact Resistance And Methods For Forming The Same [patent_app_type] => utility [patent_app_number] => 18/353732 [patent_app_country] => US [patent_app_date] => 2023-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7519 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18353732 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/353732
Stacked Multi-Gate Device With Reduced Contact Resistance And Methods For Forming The Same Jul 16, 2023 Pending
Array ( [id] => 18789328 [patent_doc_number] => 20230377983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => METHOD TO REDUCE PARASITIC RESISTANCE FOR CFET DEVICES THROUGH SINGLE DAMASCENE PROCESSING OF VIAS [patent_app_type] => utility [patent_app_number] => 18/319915 [patent_app_country] => US [patent_app_date] => 2023-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24550 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18319915 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/319915
METHOD TO REDUCE PARASITIC RESISTANCE FOR CFET DEVICES THROUGH SINGLE DAMASCENE PROCESSING OF VIAS May 17, 2023 Pending
Array ( [id] => 18813006 [patent_doc_number] => 20230387343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => METHOD FOR MANUFACTURING LIGHT-EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 18/306348 [patent_app_country] => US [patent_app_date] => 2023-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6279 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18306348 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/306348
METHOD FOR MANUFACTURING LIGHT-EMITTING DEVICE Apr 24, 2023 Pending
Array ( [id] => 18879638 [patent_doc_number] => 20240003007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 18/138192 [patent_app_country] => US [patent_app_date] => 2023-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7008 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18138192 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/138192
METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE Apr 23, 2023 Pending
Array ( [id] => 19531903 [patent_doc_number] => 20240355805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => METHOD OF FORMING SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/304350 [patent_app_country] => US [patent_app_date] => 2023-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5990 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18304350 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/304350
METHOD OF FORMING SEMICONDUCTOR STRUCTURE Apr 20, 2023 Pending
Array ( [id] => 19484036 [patent_doc_number] => 20240332078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => POST-LASER DICING WAFER-LEVEL TESTING [patent_app_type] => utility [patent_app_number] => 18/194126 [patent_app_country] => US [patent_app_date] => 2023-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4364 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18194126 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/194126
POST-LASER DICING WAFER-LEVEL TESTING Mar 30, 2023 Pending
Array ( [id] => 18488559 [patent_doc_number] => 20230215907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => IMAGE DISPLAY DEVICE MANUFACTURING METHOD AND IMAGE DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/176697 [patent_app_country] => US [patent_app_date] => 2023-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26218 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18176697 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/176697
IMAGE DISPLAY DEVICE MANUFACTURING METHOD AND IMAGE DISPLAY DEVICE Feb 28, 2023 Pending
Array ( [id] => 18456483 [patent_doc_number] => 20230197765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/113161 [patent_app_country] => US [patent_app_date] => 2023-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10133 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18113161 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/113161
DISPLAY DEVICE Feb 22, 2023 Pending
Array ( [id] => 18812806 [patent_doc_number] => 20230387143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/172218 [patent_app_country] => US [patent_app_date] => 2023-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18473 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18172218 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/172218
DISPLAY DEVICE Feb 20, 2023 Pending
Array ( [id] => 18943757 [patent_doc_number] => 20240038896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/108114 [patent_app_country] => US [patent_app_date] => 2023-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18108114 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/108114
THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME Feb 9, 2023 Abandoned
Array ( [id] => 19206229 [patent_doc_number] => 20240178128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE INCLUDING FORKSHEET TRANSISTORS AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/099952 [patent_app_country] => US [patent_app_date] => 2023-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14141 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18099952 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/099952
SEMICONDUCTOR DEVICE STRUCTURE INCLUDING FORKSHEET TRANSISTORS AND METHODS OF FORMING THE SAME Jan 21, 2023 Pending
Array ( [id] => 19176357 [patent_doc_number] => 20240162331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => STRUCTURE AND METHOD FOR MULTI-GATE SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/157448 [patent_app_country] => US [patent_app_date] => 2023-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11545 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18157448 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/157448
STRUCTURE AND METHOD FOR MULTI-GATE SEMICONDUCTOR DEVICES Jan 19, 2023 Pending
Array ( [id] => 19335796 [patent_doc_number] => 20240250226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => LAYERED CIRCUIT WITH VERTICAL LED-PHOTODIODE COMMUNICATIONS [patent_app_type] => utility [patent_app_number] => 18/099811 [patent_app_country] => US [patent_app_date] => 2023-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2873 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18099811 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/099811
LAYERED CIRCUIT WITH VERTICAL LED-PHOTODIODE COMMUNICATIONS Jan 19, 2023 Abandoned
Array ( [id] => 18381942 [patent_doc_number] => 20230157033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 18/156459 [patent_app_country] => US [patent_app_date] => 2023-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5524 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18156459 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/156459
SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREFOR Jan 18, 2023 Pending
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