Search

Mohammad M Ali

Examiner (ID: 9935, Phone: (571)272-4806 , Office: P/3744 )

Most Active Art Unit
3744
Art Unit(s)
3784, 3744
Total Applications
2900
Issued Applications
2328
Pending Applications
41
Abandoned Applications
531

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18721585 [patent_doc_number] => 11798942 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Methods of manufacturing semiconductor devices having fins and an isolation region [patent_app_type] => utility [patent_app_number] => 17/240673 [patent_app_country] => US [patent_app_date] => 2021-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 39 [patent_no_of_words] => 7313 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17240673 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/240673
Methods of manufacturing semiconductor devices having fins and an isolation region Apr 25, 2021 Issued
Array ( [id] => 17011682 [patent_doc_number] => 20210242843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => POWER AMPLIFIER CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/238835 [patent_app_country] => US [patent_app_date] => 2021-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4969 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17238835 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/238835
Power amplifier circuit Apr 22, 2021 Issued
Array ( [id] => 18999660 [patent_doc_number] => 11916523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Amplification apparatus, integration apparatus and modulation apparatus each including duty-cycled resistor [patent_app_type] => utility [patent_app_number] => 17/228982 [patent_app_country] => US [patent_app_date] => 2021-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7107 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17228982 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/228982
Amplification apparatus, integration apparatus and modulation apparatus each including duty-cycled resistor Apr 12, 2021 Issued
Array ( [id] => 18891617 [patent_doc_number] => 11870399 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Receiver for cancelling common mode offset and crosstalk [patent_app_type] => utility [patent_app_number] => 17/227996 [patent_app_country] => US [patent_app_date] => 2021-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 14275 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17227996 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/227996
Receiver for cancelling common mode offset and crosstalk Apr 11, 2021 Issued
Array ( [id] => 19428814 [patent_doc_number] => 12088254 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Doherty power amplifier with integrated second harmonic injection [patent_app_type] => utility [patent_app_number] => 17/222371 [patent_app_country] => US [patent_app_date] => 2021-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1936 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17222371 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/222371
Doherty power amplifier with integrated second harmonic injection Apr 4, 2021 Issued
Array ( [id] => 19277305 [patent_doc_number] => 12027437 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Superconducting device having a plurality of thermal sink layers and a plurality of ground planes [patent_app_type] => utility [patent_app_number] => 17/222238 [patent_app_country] => US [patent_app_date] => 2021-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3835 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17222238 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/222238
Superconducting device having a plurality of thermal sink layers and a plurality of ground planes Apr 4, 2021 Issued
Array ( [id] => 17918672 [patent_doc_number] => 20220321068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => HIGH ACCURACY OUTPUT VOLTAGE DOMAIN OPERATION SWITCHING IN AN OPERATIONAL AMPLIFIER [patent_app_type] => utility [patent_app_number] => 17/220086 [patent_app_country] => US [patent_app_date] => 2021-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5291 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17220086 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/220086
High accuracy output voltage domain operation switching in an operational amplifier Mar 31, 2021 Issued
Array ( [id] => 17917558 [patent_doc_number] => 20220319954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => PACKAGE HEAT DISSIPATION [patent_app_type] => utility [patent_app_number] => 17/219602 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17219602 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/219602
PACKAGE HEAT DISSIPATION Mar 30, 2021 Pending
Array ( [id] => 18761555 [patent_doc_number] => 11812609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Three-dimensional semiconductor device having a first main separation structure and a second main separation structure on a lower structure [patent_app_type] => utility [patent_app_number] => 17/218267 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 10018 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17218267 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/218267
Three-dimensional semiconductor device having a first main separation structure and a second main separation structure on a lower structure Mar 30, 2021 Issued
Array ( [id] => 18106031 [patent_doc_number] => 11545937 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Dual-mode average power tracking (APT) controller [patent_app_type] => utility [patent_app_number] => 17/215132 [patent_app_country] => US [patent_app_date] => 2021-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3530 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17215132 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/215132
Dual-mode average power tracking (APT) controller Mar 28, 2021 Issued
Array ( [id] => 16952414 [patent_doc_number] => 20210211106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-08 [patent_title] => POWER AMPLIFICATION MODULE [patent_app_type] => utility [patent_app_number] => 17/211072 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4441 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 334 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17211072 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/211072
Power amplification module Mar 23, 2021 Issued
Array ( [id] => 17599418 [patent_doc_number] => 20220148992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => PACKAGE STRUCTURE AND METHOD OF FORMING THE PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/211623 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9542 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17211623 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/211623
Package structure including a base and a lid disposed over the base and method of forming the package structure Mar 23, 2021 Issued
Array ( [id] => 17901741 [patent_doc_number] => 20220311403 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => SYSTEMS AND METHODS FOR LINEAR VARIABLE GAIN AMPLIFIER [patent_app_type] => utility [patent_app_number] => 17/210080 [patent_app_country] => US [patent_app_date] => 2021-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5594 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17210080 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/210080
Systems and methods for linear variable gain amplifier Mar 22, 2021 Issued
Array ( [id] => 18000870 [patent_doc_number] => 11501981 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-15 [patent_title] => Methods for fabricating semiconductor packages by using a mold press with an upper chase and a lower chase [patent_app_type] => utility [patent_app_number] => 17/203508 [patent_app_country] => US [patent_app_date] => 2021-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5094 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17203508 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/203508
Methods for fabricating semiconductor packages by using a mold press with an upper chase and a lower chase Mar 15, 2021 Issued
Array ( [id] => 18579014 [patent_doc_number] => 11735554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Wafer-level chip scale packaging structure having a rewiring layer and method for manufacturing the wafer-level chip scale packaging structure [patent_app_type] => utility [patent_app_number] => 17/200705 [patent_app_country] => US [patent_app_date] => 2021-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 2772 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17200705 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/200705
Wafer-level chip scale packaging structure having a rewiring layer and method for manufacturing the wafer-level chip scale packaging structure Mar 11, 2021 Issued
Array ( [id] => 19029948 [patent_doc_number] => 11929314 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Interconnect structures including a fin structure and a metal cap [patent_app_type] => utility [patent_app_number] => 17/200024 [patent_app_country] => US [patent_app_date] => 2021-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9083 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17200024 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/200024
Interconnect structures including a fin structure and a metal cap Mar 11, 2021 Issued
Array ( [id] => 16921347 [patent_doc_number] => 20210194439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => POWER AMPLIFIER CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/197724 [patent_app_country] => US [patent_app_date] => 2021-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17197724 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/197724
Power amplifier circuit Mar 9, 2021 Issued
Array ( [id] => 18857317 [patent_doc_number] => 11854912 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Semiconductor package including a chip pad having a connection portion and test portion in a first surface of the chip pad [patent_app_type] => utility [patent_app_number] => 17/196538 [patent_app_country] => US [patent_app_date] => 2021-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 10775 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17196538 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/196538
Semiconductor package including a chip pad having a connection portion and test portion in a first surface of the chip pad Mar 8, 2021 Issued
Array ( [id] => 18191252 [patent_doc_number] => 11581863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-14 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/194985 [patent_app_country] => US [patent_app_date] => 2021-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 9084 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17194985 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/194985
Semiconductor device Mar 7, 2021 Issued
Array ( [id] => 17086219 [patent_doc_number] => 20210281226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => POWER AMPLIFIER MODULE [patent_app_type] => utility [patent_app_number] => 17/193494 [patent_app_country] => US [patent_app_date] => 2021-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4818 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17193494 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/193494
Power amplifier module Mar 4, 2021 Issued
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