Search

Mohammad M. Ali

Examiner (ID: 3439, Phone: (571)272-4806 , Office: P/3744 )

Most Active Art Unit
3744
Art Unit(s)
3784, 3744
Total Applications
2900
Issued Applications
2338
Pending Applications
41
Abandoned Applications
530

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17456121 [patent_doc_number] => 11270988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => 3D semiconductor device(s) and structure(s) with electronic control units [patent_app_type] => utility [patent_app_number] => 17/151867 [patent_app_country] => US [patent_app_date] => 2021-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 57 [patent_no_of_words] => 17624 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17151867 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/151867
3D semiconductor device(s) and structure(s) with electronic control units Jan 18, 2021 Issued
Array ( [id] => 17752948 [patent_doc_number] => 20220231153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => CMOS Fabrication Methods for Back-Gate Transistor [patent_app_type] => utility [patent_app_number] => 17/150658 [patent_app_country] => US [patent_app_date] => 2021-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7572 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17150658 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/150658
CMOS fabrication methods for back-gate transistor Jan 14, 2021 Issued
Array ( [id] => 17862920 [patent_doc_number] => 11444081 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-13 [patent_title] => Integrated circuit (IC) device [patent_app_type] => utility [patent_app_number] => 17/150712 [patent_app_country] => US [patent_app_date] => 2021-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 54 [patent_no_of_words] => 13262 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17150712 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/150712
Integrated circuit (IC) device Jan 14, 2021 Issued
Array ( [id] => 18131406 [patent_doc_number] => 11557623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Image pickup element, method of manufacturing image pickup element, and electronic apparatus [patent_app_type] => utility [patent_app_number] => 17/145488 [patent_app_country] => US [patent_app_date] => 2021-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 8029 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17145488 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/145488
Image pickup element, method of manufacturing image pickup element, and electronic apparatus Jan 10, 2021 Issued
Array ( [id] => 18623826 [patent_doc_number] => 11756882 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Semiconductor die with blast shielding [patent_app_type] => utility [patent_app_number] => 17/138906 [patent_app_country] => US [patent_app_date] => 2020-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 8778 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17138906 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/138906
Semiconductor die with blast shielding Dec 30, 2020 Issued
Array ( [id] => 18024316 [patent_doc_number] => 20220375815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => Semiconductor Package and Method for Manufacturing the Same [patent_app_type] => utility [patent_app_number] => 17/259938 [patent_app_country] => US [patent_app_date] => 2020-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4469 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17259938 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/259938
Semiconductor package and method for manufacturing the same Dec 27, 2020 Issued
Array ( [id] => 16765496 [patent_doc_number] => 20210111078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-15 [patent_title] => FABRICATION OF SILICON GERMANIUM CHANNEL AND SILICON/SILICON GERMANIUM DUAL CHANNEL FIELD-EFFECT TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/132253 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17132253 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/132253
Fabrication of silicon germanium channel and silicon/silicon germanium dual channel field-effect transistors Dec 22, 2020 Issued
Array ( [id] => 16920511 [patent_doc_number] => 20210193603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => CIRCUITRY FOR ELECTRICAL REDUNDANCY IN BONDED STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/125899 [patent_app_country] => US [patent_app_date] => 2020-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17125899 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/125899
Circuitry for electrical redundancy in bonded structures Dec 16, 2020 Issued
Array ( [id] => 17676754 [patent_doc_number] => 20220189921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => STACKED DIE CIRCUIT ROUTING SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 17/121039 [patent_app_country] => US [patent_app_date] => 2020-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5540 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17121039 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/121039
Stacked die circuit routing system and method Dec 13, 2020 Issued
Array ( [id] => 19000945 [patent_doc_number] => 11917823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Channel structures having protruding portions in three-dimensional memory device and method for forming the same [patent_app_type] => utility [patent_app_number] => 17/117744 [patent_app_country] => US [patent_app_date] => 2020-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13567 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17117744 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/117744
Channel structures having protruding portions in three-dimensional memory device and method for forming the same Dec 9, 2020 Issued
Array ( [id] => 17599495 [patent_doc_number] => 20220149069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => CHANNEL STRUCTURES HAVING PROTRUDING PORTIONS IN THREE-DIMENSIONAL MEMORY DEVICE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/117728 [patent_app_country] => US [patent_app_date] => 2020-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11599 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17117728 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/117728
Channel structures having protruding portions in three-dimensional memory device and method for forming the same Dec 9, 2020 Issued
Array ( [id] => 16781904 [patent_doc_number] => 20210118983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => CAPACITOR INCLUDING MULTILAYER DIELECTRIC STACK [patent_app_type] => utility [patent_app_number] => 17/116297 [patent_app_country] => US [patent_app_date] => 2020-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9792 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17116297 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/116297
Capacitor including multilayer dielectric stack Dec 8, 2020 Issued
Array ( [id] => 16723796 [patent_doc_number] => 20210090943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => Method of Forming Trenches with Different Depths [patent_app_type] => utility [patent_app_number] => 17/114174 [patent_app_country] => US [patent_app_date] => 2020-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6438 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17114174 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/114174
Method of forming trenches with different depths Dec 6, 2020 Issued
Array ( [id] => 16723794 [patent_doc_number] => 20210090941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => APPARATUS WITH OVERLAPPING DEEP TRENCH AND SHALLOW TRENCH AND METHOD OF FABRICATING THE SAME WITH LOW DEFECT DENSITY [patent_app_type] => utility [patent_app_number] => 17/110478 [patent_app_country] => US [patent_app_date] => 2020-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5042 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17110478 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/110478
APPARATUS WITH OVERLAPPING DEEP TRENCH AND SHALLOW TRENCH AND METHOD OF FABRICATING THE SAME WITH LOW DEFECT DENSITY Dec 2, 2020 Pending
Array ( [id] => 19355198 [patent_doc_number] => 12055633 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Package for a time of flight device [patent_app_type] => utility [patent_app_number] => 17/109943 [patent_app_country] => US [patent_app_date] => 2020-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 12546 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17109943 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/109943
Package for a time of flight device Dec 1, 2020 Issued
Array ( [id] => 18205488 [patent_doc_number] => 11587893 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-21 [patent_title] => Distribution layer structure and manufacturing method thereof, and bond pad structure [patent_app_type] => utility [patent_app_number] => 17/109783 [patent_app_country] => US [patent_app_date] => 2020-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 5724 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17109783 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/109783
Distribution layer structure and manufacturing method thereof, and bond pad structure Dec 1, 2020 Issued
Array ( [id] => 20243174 [patent_doc_number] => 12423494 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Memory device with improved anti-fuse read current [patent_app_type] => utility [patent_app_number] => 17/103073 [patent_app_country] => US [patent_app_date] => 2020-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 34 [patent_no_of_words] => 8550 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17103073 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/103073
Memory device with improved anti-fuse read current Nov 23, 2020 Issued
Array ( [id] => 20455977 [patent_doc_number] => 12519039 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-06 [patent_title] => Sensing device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/102546 [patent_app_country] => US [patent_app_date] => 2020-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 0 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17102546 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/102546
Sensing device and manufacturing method thereof Nov 23, 2020 Issued
Array ( [id] => 16794362 [patent_doc_number] => 20210124179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => IMAGE SENSOR INCLUDING COLOR SEPARATING LENS ARRAY AND ELECTRONIC APPARATUS INCLUDING THE IMAGE SENSOR [patent_app_type] => utility [patent_app_number] => 17/078612 [patent_app_country] => US [patent_app_date] => 2020-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19472 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17078612 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/078612
IMAGE SENSOR INCLUDING COLOR SEPARATING LENS ARRAY AND ELECTRONIC APPARATUS INCLUDING THE IMAGE SENSOR Oct 22, 2020 Pending
Array ( [id] => 18047967 [patent_doc_number] => 11521925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Semiconductor module [patent_app_type] => utility [patent_app_number] => 17/078644 [patent_app_country] => US [patent_app_date] => 2020-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7185 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 375 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17078644 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/078644
Semiconductor module Oct 22, 2020 Issued
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