Search

Mohammad M Ali

Examiner (ID: 9935, Phone: (571)272-4806 , Office: P/3744 )

Most Active Art Unit
3744
Art Unit(s)
3784, 3744
Total Applications
2900
Issued Applications
2328
Pending Applications
41
Abandoned Applications
531

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15352891 [patent_doc_number] => 20200014337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => DOHERTY AMPLIFIER [patent_app_type] => utility [patent_app_number] => 16/456697 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2891 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16456697 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/456697
Doherty amplifier Jun 27, 2019 Issued
Array ( [id] => 16545277 [patent_doc_number] => 20200411692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => TRANSISTOR STRUCTURES WITH A METAL OXIDE CONTACT BUFFER [patent_app_type] => utility [patent_app_number] => 16/455581 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10376 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455581 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/455581
Transistor structures with a metal oxide contact buffer Jun 26, 2019 Issued
Array ( [id] => 16536873 [patent_doc_number] => 10879490 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Display panel and display device including an uneven structure on a barrier [patent_app_type] => utility [patent_app_number] => 16/455535 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 5313 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 375 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455535 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/455535
Display panel and display device including an uneven structure on a barrier Jun 26, 2019 Issued
Array ( [id] => 17700137 [patent_doc_number] => 11373870 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-28 [patent_title] => Method for manufacturing semiconductor device including performing thermal treatment on germanium layer [patent_app_type] => utility [patent_app_number] => 16/455370 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 7790 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455370 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/455370
Method for manufacturing semiconductor device including performing thermal treatment on germanium layer Jun 26, 2019 Issued
Array ( [id] => 16545007 [patent_doc_number] => 20200411422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 16/455597 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4281 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455597 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/455597
Semiconductor package including low side field-effect transistors and high side field-effect transistors and method of making the same Jun 26, 2019 Issued
Array ( [id] => 17310173 [patent_doc_number] => 11211299 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Wiring structure having at least one sub-unit [patent_app_type] => utility [patent_app_number] => 16/455552 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 9194 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455552 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/455552
Wiring structure having at least one sub-unit Jun 26, 2019 Issued
Array ( [id] => 17093099 [patent_doc_number] => 11121297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Method of manufacturing light emitting device that includes a first reflecting layer and a second reflecting layer [patent_app_type] => utility [patent_app_number] => 16/455620 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 11574 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455620 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/455620
Method of manufacturing light emitting device that includes a first reflecting layer and a second reflecting layer Jun 26, 2019 Issued
Array ( [id] => 16516111 [patent_doc_number] => 20200395369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-17 [patent_title] => STRUCTURE OF MEMORY DEVICE HAVING FLOATING GATE WITH PROTRUDING STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/455297 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4000 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455297 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/455297
Structure of memory device having floating gate with protruding structure Jun 26, 2019 Issued
Array ( [id] => 16777070 [patent_doc_number] => 20210114147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => ANISOTROPIC CONDUCTIVE FILM, METHOD FOR PRODUCING SAME, AND METHOD FOR PRODUCING CONNECTION STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/255980 [patent_app_country] => US [patent_app_date] => 2019-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27648 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17255980 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/255980
ANISOTROPIC CONDUCTIVE FILM, METHOD FOR PRODUCING SAME, AND METHOD FOR PRODUCING CONNECTION STRUCTURE Jun 25, 2019 Pending
Array ( [id] => 15842567 [patent_doc_number] => 20200136566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => AMPLIFYING APPARATUS WITH IMPROVED LINEARITY [patent_app_type] => utility [patent_app_number] => 16/452986 [patent_app_country] => US [patent_app_date] => 2019-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5831 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16452986 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/452986
Amplifying apparatus with improved linearity Jun 25, 2019 Issued
Array ( [id] => 14940203 [patent_doc_number] => 20190305740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => Gain-Dependent Impedance Matching and Linearity [patent_app_type] => utility [patent_app_number] => 16/446492 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11820 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446492 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446492
Gain-Dependent Impedance Matching and Linearity Jun 18, 2019 Abandoned
Array ( [id] => 15416293 [patent_doc_number] => 20200028469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => APPARATUS AND METHOD FOR CALIBRATING CHARACTERISTICS OF POWER AMPLIFIER IN TRANSMITTER [patent_app_type] => utility [patent_app_number] => 16/439713 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2835 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16439713 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/439713
Apparatus and method for calibrating characteristics of power amplifier in transmitter Jun 12, 2019 Issued
Array ( [id] => 14904845 [patent_doc_number] => 20190296188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => MICRO LIGHT-EMITTING DIODE CHIP [patent_app_type] => utility [patent_app_number] => 16/438483 [patent_app_country] => US [patent_app_date] => 2019-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4993 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16438483 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/438483
MICRO LIGHT-EMITTING DIODE CHIP Jun 11, 2019 Abandoned
Array ( [id] => 16508953 [patent_doc_number] => 20200388209 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => MICRO LIGHT-EMITTING DIODE DISPLAY [patent_app_type] => utility [patent_app_number] => 16/432946 [patent_app_country] => US [patent_app_date] => 2019-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 335 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16432946 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/432946
Micro light-emitting diode display having two or more types of data lines Jun 5, 2019 Issued
Array ( [id] => 16842736 [patent_doc_number] => 11014807 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Method for producing a system including a first microelectromechanical element and a second microelectromechanical element, and a system [patent_app_type] => utility [patent_app_number] => 16/433108 [patent_app_country] => US [patent_app_date] => 2019-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4030 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16433108 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/433108
Method for producing a system including a first microelectromechanical element and a second microelectromechanical element, and a system Jun 5, 2019 Issued
Array ( [id] => 17018345 [patent_doc_number] => 11087990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Semiconductor device with a stacked structure and a capping insulation layer [patent_app_type] => utility [patent_app_number] => 16/433218 [patent_app_country] => US [patent_app_date] => 2019-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 30 [patent_no_of_words] => 9297 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16433218 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/433218
Semiconductor device with a stacked structure and a capping insulation layer Jun 5, 2019 Issued
Array ( [id] => 15299807 [patent_doc_number] => 20190393039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => METHOD FOR MANUFACTURING CONDUCTIVE PLUG [patent_app_type] => utility [patent_app_number] => 16/433250 [patent_app_country] => US [patent_app_date] => 2019-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2768 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16433250 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/433250
METHOD FOR MANUFACTURING CONDUCTIVE PLUG Jun 5, 2019 Abandoned
Array ( [id] => 16509878 [patent_doc_number] => 20200389134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => Low-Noise Amplifier With Quantized Conduction Channel [patent_app_type] => utility [patent_app_number] => 16/433163 [patent_app_country] => US [patent_app_date] => 2019-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6210 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16433163 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/433163
Low-noise amplifier with quantized conduction channel Jun 5, 2019 Issued
Array ( [id] => 16819910 [patent_doc_number] => 11004748 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Semiconductor devices with wide gate-to-gate spacing [patent_app_type] => utility [patent_app_number] => 16/432899 [patent_app_country] => US [patent_app_date] => 2019-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 4673 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16432899 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/432899
Semiconductor devices with wide gate-to-gate spacing Jun 4, 2019 Issued
Array ( [id] => 15155617 [patent_doc_number] => 20190356286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => POWER DENSITY MATCHING CIRCUITS FOR POWER AMPLIFIERS [patent_app_type] => utility [patent_app_number] => 16/431644 [patent_app_country] => US [patent_app_date] => 2019-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6390 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16431644 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/431644
POWER DENSITY MATCHING CIRCUITS FOR POWER AMPLIFIERS Jun 3, 2019 Abandoned
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