Mohammad M. Ali

Array ( [id] => 18488478 [patent_doc_number] => 20230215826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/147501 [patent_app_country] => US [patent_app_date] => 2022-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16533 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18147501 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19288059 [patent_doc_number] => 20240224542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => PROGRAMMABLE HYBRID MEMORY AND CAPACITIVE DEVICE IN A DRAM PROCESS [patent_app_type] => utility [patent_app_number] => 18/090216 [patent_app_country] => US [patent_app_date] => 2022-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3373 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18090216 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19271564 [patent_doc_number] => 20240215271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICES AND FABRICATING METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 18/089488 [patent_app_country] => US [patent_app_date] => 2022-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 77397 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18089488 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19255151 [patent_doc_number] => 20240206148 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => MEMORY DEVICES AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/089472 [patent_app_country] => US [patent_app_date] => 2022-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9401 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18089472 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19842780 [patent_doc_number] => 12255181 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Methods for forming three-dimensional memory devices [patent_app_type] => utility [patent_app_number] => 18/088419 [patent_app_country] => US [patent_app_date] => 2022-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 35 [patent_no_of_words] => 25237 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18088419 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18600253 [patent_doc_number] => 20230275054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/086086 [patent_app_country] => US [patent_app_date] => 2022-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13329 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18086086 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18743441 [patent_doc_number] => 20230352429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/082886 [patent_app_country] => US [patent_app_date] => 2022-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7332 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18082886 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18821226 [patent_doc_number] => 20230395567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/066558 [patent_app_country] => US [patent_app_date] => 2022-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11159 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18066558 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18821099 [patent_doc_number] => 20230395440 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => METHOD OF HANDLING TEST PAD AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/081230 [patent_app_country] => US [patent_app_date] => 2022-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6205 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18081230 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19237450 [patent_doc_number] => 20240194645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => U-TURN CIRCUITRY TO CONVERT INTER-LAYER CONNECTIONS OF AN INTEGRATED CIRCUIT DEVICE TO INTRA-LAYER CONNECTIONS [patent_app_type] => utility [patent_app_number] => 18/079631 [patent_app_country] => US [patent_app_date] => 2022-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3396 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18079631 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19191511 [patent_doc_number] => 20240170424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICES AND FABRICATING METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 18/078898 [patent_app_country] => US [patent_app_date] => 2022-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15202 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18078898 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18927262 [patent_doc_number] => 20240030266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => STACKED SEMICONDUCTOR DEVICE INCLUDING HYBRID BONDING STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/064134 [patent_app_country] => US [patent_app_date] => 2022-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4695 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18064134 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18294869 [patent_doc_number] => 20230104555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-06 [patent_title] => SEMICONDUCTOR APPARATUS AND ELECTRONIC DEVICE THAT INCLUDES SEMICONDUCTOR APPARATUS [patent_app_type] => utility [patent_app_number] => 18/063529 [patent_app_country] => US [patent_app_date] => 2022-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14925 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18063529 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19582595 [patent_doc_number] => 12148723 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => Structure of semiconductor device [patent_app_type] => utility [patent_app_number] => 18/077191 [patent_app_country] => US [patent_app_date] => 2022-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4177 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18077191 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19221490 [patent_doc_number] => 20240186194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => TEST ELEMENT GROUP FOR METAL ROUTING LAYER AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/061476 [patent_app_country] => US [patent_app_date] => 2022-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3824 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18061476 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18848924 [patent_doc_number] => 20230411328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/060036 [patent_app_country] => US [patent_app_date] => 2022-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15265 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18060036 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19191498 [patent_doc_number] => 20240170411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => SCRIBE LANE REINFORCEMENT [patent_app_type] => utility [patent_app_number] => 18/057135 [patent_app_country] => US [patent_app_date] => 2022-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14479 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18057135 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18240418 [patent_doc_number] => 20230072729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => METHOD OF MANUFACTURING ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/985902 [patent_app_country] => US [patent_app_date] => 2022-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6407 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17985902 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19161160 [patent_doc_number] => 20240153867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => DIAGONAL WIRING LEVEL WITH SKIP-LEVEL VIA CONNECTIONS [patent_app_type] => utility [patent_app_number] => 17/983863 [patent_app_country] => US [patent_app_date] => 2022-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5154 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17983863 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18228641 [patent_doc_number] => 20230067635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => METHODS RELATED TO FORMING SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/053766 [patent_app_country] => US [patent_app_date] => 2022-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9516 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18053766 [rel_patent_id] =>[rel_patent_doc_number] =>)