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Mohammad M Ali

Examiner (ID: 9935, Phone: (571)272-4806 , Office: P/3744 )

Most Active Art Unit
3744
Art Unit(s)
3784, 3744
Total Applications
2900
Issued Applications
2328
Pending Applications
41
Abandoned Applications
531

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17934087 [patent_doc_number] => 20220329213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => HIGH FREQUENCY PACKAGE [patent_app_type] => utility [patent_app_number] => 17/846561 [patent_app_country] => US [patent_app_date] => 2022-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6860 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17846561 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/846561
High frequency package Jun 21, 2022 Issued
Array ( [id] => 18782723 [patent_doc_number] => 11824499 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Power amplifier circuit [patent_app_type] => utility [patent_app_number] => 17/806524 [patent_app_country] => US [patent_app_date] => 2022-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 7232 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806524 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/806524
Power amplifier circuit Jun 12, 2022 Issued
Array ( [id] => 18782269 [patent_doc_number] => 11824035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Method of manufacturing a semiconductor device including bonding layer and adsorption layer [patent_app_type] => utility [patent_app_number] => 17/826756 [patent_app_country] => US [patent_app_date] => 2022-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 26 [patent_no_of_words] => 7670 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17826756 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/826756
Method of manufacturing a semiconductor device including bonding layer and adsorption layer May 26, 2022 Issued
Array ( [id] => 17870917 [patent_doc_number] => 20220293654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => IMAGE SENSING DEVICE WITH GRID STRUCTURE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/824952 [patent_app_country] => US [patent_app_date] => 2022-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7124 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17824952 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/824952
Method for fabricating an image sensing device having a primary grid and a second grid surrounding the primary grid May 25, 2022 Issued
Array ( [id] => 17871081 [patent_doc_number] => 20220293818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => LIGHT-EMITTING DISPLAY DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/751758 [patent_app_country] => US [patent_app_date] => 2022-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17751758 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/751758
Light-emitting display device having a first pixel and a second pixel and an oxide semiconductor layer having a region overlapping a light-emitting region of the second pixel May 23, 2022 Issued
Array ( [id] => 18790142 [patent_doc_number] => 20230378923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => PLAY MUTE CIRCUIT AND METHOD [patent_app_type] => utility [patent_app_number] => 17/747845 [patent_app_country] => US [patent_app_date] => 2022-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9547 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17747845 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/747845
PLAY MUTE CIRCUIT AND METHOD May 17, 2022 Pending
Array ( [id] => 17840790 [patent_doc_number] => 20220278096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-01 [patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING A STANDARD CELL WHICH INCLUDES A FIN AND A DUMMY TRANSISTOR [patent_app_type] => utility [patent_app_number] => 17/744141 [patent_app_country] => US [patent_app_date] => 2022-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4658 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 363 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17744141 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/744141
Semiconductor integrated circuit device having a standard cell which includes a fin and a dummy transistor May 12, 2022 Issued
Array ( [id] => 17834414 [patent_doc_number] => 20220271718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/742404 [patent_app_country] => US [patent_app_date] => 2022-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17742404 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/742404
Semiconductor integrated circuit May 11, 2022 Issued
Array ( [id] => 17950177 [patent_doc_number] => 20220337196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => Transistor Bias Adjustment for Optimization of Third Order Intercept Point in a Cascode Amplifier [patent_app_type] => utility [patent_app_number] => 17/737878 [patent_app_country] => US [patent_app_date] => 2022-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8658 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17737878 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/737878
Transistor bias adjustment for optimization of third order intercept point in a cascode amplifier May 4, 2022 Issued
Array ( [id] => 17950186 [patent_doc_number] => 20220337205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => SYSTEM AND METHOD FOR ADJUSTING AMPLIFIER BIAS USING ENVELOPE TRACKING [patent_app_type] => utility [patent_app_number] => 17/735358 [patent_app_country] => US [patent_app_date] => 2022-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17735358 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/735358
System and method for adjusting amplifier bias using envelope tracking May 2, 2022 Issued
Array ( [id] => 19260981 [patent_doc_number] => 12021047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => Semiconductor packages having a die, an encapsulant, and a redistribution structure [patent_app_type] => utility [patent_app_number] => 17/727242 [patent_app_country] => US [patent_app_date] => 2022-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 51 [patent_no_of_words] => 12621 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17727242 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/727242
Semiconductor packages having a die, an encapsulant, and a redistribution structure Apr 21, 2022 Issued
Array ( [id] => 17917920 [patent_doc_number] => 20220320316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => NANOSHEET FIELD EFFECT TRANSISTORS WITH PARTIAL INSIDE SPACERS [patent_app_type] => utility [patent_app_number] => 17/726766 [patent_app_country] => US [patent_app_date] => 2022-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9639 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17726766 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/726766
NANOSHEET FIELD EFFECT TRANSISTORS WITH PARTIAL INSIDE SPACERS Apr 21, 2022 Pending
Array ( [id] => 18697161 [patent_doc_number] => 20230327620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => TRANSCONDUCTANCE AMPLIFIER OF HIGH LINEARITY AND COMMON-MODE REJECTION [patent_app_type] => utility [patent_app_number] => 17/716004 [patent_app_country] => US [patent_app_date] => 2022-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3754 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17716004 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/716004
Transconductance amplifier of high linearity and common-mode rejection Apr 7, 2022 Issued
Array ( [id] => 18967553 [patent_doc_number] => 11901335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-13 [patent_title] => Semiconductor package with routing patch and conductive interconnection structures laterally displaced from routing patch [patent_app_type] => utility [patent_app_number] => 17/706848 [patent_app_country] => US [patent_app_date] => 2022-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5294 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17706848 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/706848
Semiconductor package with routing patch and conductive interconnection structures laterally displaced from routing patch Mar 28, 2022 Issued
Array ( [id] => 17724117 [patent_doc_number] => 20220216839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => STABILIZING COMMON MODE OF DIFFERENTIAL SWITCHING OUTPUT STAGE [patent_app_type] => utility [patent_app_number] => 17/702025 [patent_app_country] => US [patent_app_date] => 2022-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12339 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17702025 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/702025
STABILIZING COMMON MODE OF DIFFERENTIAL SWITCHING OUTPUT STAGE Mar 22, 2022 Pending
Array ( [id] => 17676702 [patent_doc_number] => 20220189869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/687257 [patent_app_country] => US [patent_app_date] => 2022-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11523 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17687257 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/687257
Method of manufacturing a semiconductor memory device having capacitor electrodes and a vertical contact plug Mar 3, 2022 Issued
Array ( [id] => 18615875 [patent_doc_number] => 20230282614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => INTEGRATED CIRCUIT PACKAGES AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/683377 [patent_app_country] => US [patent_app_date] => 2022-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8226 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17683377 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/683377
INTEGRATED CIRCUIT PACKAGES AND METHODS OF FORMING THE SAME Feb 28, 2022 Pending
Array ( [id] => 19154195 [patent_doc_number] => 11979120 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Amplifier circuitry and current sensor having the same [patent_app_type] => utility [patent_app_number] => 17/680721 [patent_app_country] => US [patent_app_date] => 2022-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 8885 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17680721 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/680721
Amplifier circuitry and current sensor having the same Feb 24, 2022 Issued
Array ( [id] => 17692172 [patent_doc_number] => 20220199465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => INTEGRATED FAN-OUT PACKAGES AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/676627 [patent_app_country] => US [patent_app_date] => 2022-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9077 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17676627 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/676627
Method of forming integrated fan-out packages with built-in heat sink Feb 20, 2022 Issued
Array ( [id] => 17856056 [patent_doc_number] => 20220286099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => AMPLIFIER CAPABLE OF MINIMIZING SHORT-CIRCUIT CURRENT OF OUTPUT STAGE WHILE HAVING IMPROVED SLEW RATE [patent_app_type] => utility [patent_app_number] => 17/675144 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7212 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17675144 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/675144
Amplifier capable of minimizing short-circuit current of output stage while having improved slew rate Feb 17, 2022 Issued
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