Search

Mohammad M. Choudhry

Examiner (ID: 11958, Phone: (571)270-5716 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
4126, 2894, 2898, 2899, 2816
Total Applications
919
Issued Applications
720
Pending Applications
73
Abandoned Applications
141

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18423919 [patent_doc_number] => 20230178383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => RELEASE FILM FOR SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 17/922302 [patent_app_country] => US [patent_app_date] => 2021-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9837 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17922302 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/922302
RELEASE FILM FOR SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREFOR Jul 15, 2021 Abandoned
Array ( [id] => 18097567 [patent_doc_number] => 20220415908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => METAL HYBRID CHARGE STORAGE STRUCTURE FOR MEMORY [patent_app_type] => utility [patent_app_number] => 17/375540 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2781 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375540 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375540
Metal hybrid charge storage structure for memory Jul 13, 2021 Issued
Array ( [id] => 18299066 [patent_doc_number] => 20230108752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-06 [patent_title] => DISPLAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/604931 [patent_app_country] => US [patent_app_date] => 2021-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 39187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17604931 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/604931
Display substrate, manufacturing method thereof and display device Jul 7, 2021 Issued
Array ( [id] => 19414712 [patent_doc_number] => 12080548 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Selective deposition using hydrophobic precursors [patent_app_type] => utility [patent_app_number] => 17/370263 [patent_app_country] => US [patent_app_date] => 2021-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6967 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17370263 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/370263
Selective deposition using hydrophobic precursors Jul 7, 2021 Issued
Array ( [id] => 17188859 [patent_doc_number] => 20210335744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => STACKABLE FULLY MOLDED SEMICONDUCTOR STRUCTURE WITH VERTICAL INTERCONNECTS [patent_app_type] => utility [patent_app_number] => 17/368743 [patent_app_country] => US [patent_app_date] => 2021-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12895 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17368743 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/368743
Stackable fully molded semiconductor structure with vertical interconnects Jul 5, 2021 Issued
Array ( [id] => 17174183 [patent_doc_number] => 20210327854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => Packages with Metal Line Crack Prevention Design [patent_app_type] => utility [patent_app_number] => 17/361791 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4416 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361791 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/361791
Packages with metal line crack prevention design Jun 28, 2021 Issued
Array ( [id] => 18081139 [patent_doc_number] => 20220406751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => QUASI-MONOLITHIC HIERARCHICAL INTEGRATION ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 17/354773 [patent_app_country] => US [patent_app_date] => 2021-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14079 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17354773 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/354773
QUASI-MONOLITHIC HIERARCHICAL INTEGRATION ARCHITECTURE Jun 21, 2021 Abandoned
Array ( [id] => 18081008 [patent_doc_number] => 20220406620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => FABRICATING METHOD FOR WAFER LEVEL SEMICONDUCTOR PACKAGE DEVICE AND THE FABRICATED SEMICONDUCTOR PACKAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/354214 [patent_app_country] => US [patent_app_date] => 2021-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2639 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17354214 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/354214
FABRICATING METHOD FOR WAFER LEVEL SEMICONDUCTOR PACKAGE DEVICE AND THE FABRICATED SEMICONDUCTOR PACKAGE DEVICE Jun 21, 2021 Abandoned
Array ( [id] => 17143127 [patent_doc_number] => 20210311140 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => MAGNETIC FIELD SENSOR AND METHOD FOR MAKING SAME [patent_app_type] => utility [patent_app_number] => 17/351748 [patent_app_country] => US [patent_app_date] => 2021-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11352 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17351748 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/351748
MAGNETIC FIELD SENSOR AND METHOD FOR MAKING SAME Jun 17, 2021 Abandoned
Array ( [id] => 17933388 [patent_doc_number] => 20220328514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/348560 [patent_app_country] => US [patent_app_date] => 2021-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11016 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17348560 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/348560
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME Jun 14, 2021 Abandoned
Array ( [id] => 17303172 [patent_doc_number] => 20210399011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => CONFINED CHARGE TRAP LAYER [patent_app_type] => utility [patent_app_number] => 17/346910 [patent_app_country] => US [patent_app_date] => 2021-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7382 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17346910 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/346910
Confined charge trap layer Jun 13, 2021 Issued
Array ( [id] => 18061690 [patent_doc_number] => 20220392777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => SEMICONDUCTOR DEVICE PACKAGING WARPAGE CONTROL [patent_app_type] => utility [patent_app_number] => 17/337583 [patent_app_country] => US [patent_app_date] => 2021-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5036 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17337583 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/337583
Semiconductor device packaging warpage control Jun 2, 2021 Issued
Array ( [id] => 18804408 [patent_doc_number] => 11837572 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Apparatus and method for manufacturing semiconductor package structure [patent_app_type] => utility [patent_app_number] => 17/337216 [patent_app_country] => US [patent_app_date] => 2021-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6457 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17337216 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/337216
Apparatus and method for manufacturing semiconductor package structure Jun 1, 2021 Issued
Array ( [id] => 18351505 [patent_doc_number] => 20230139616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => MANUFACTURING METHOD OF DISPLAY PANEL AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 17/419727 [patent_app_country] => US [patent_app_date] => 2021-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6374 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17419727 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/419727
Manufacturing method of display panel and display panel May 30, 2021 Issued
Array ( [id] => 17247027 [patent_doc_number] => 20210366772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT AND SEMICONDUCTOR ELEMENT [patent_app_type] => utility [patent_app_number] => 17/327005 [patent_app_country] => US [patent_app_date] => 2021-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8662 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17327005 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/327005
Method of manufacturing semiconductor element and semiconductor element May 20, 2021 Issued
Array ( [id] => 17203802 [patent_doc_number] => 20210343897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => LIGHT EMITTING DIODES WITH ALUMINUM-CONTAINING LAYERS INTEGRATED THEREIN AND ASSOCIATED METHODS [patent_app_type] => utility [patent_app_number] => 17/307561 [patent_app_country] => US [patent_app_date] => 2021-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10226 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17307561 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/307561
LIGHT EMITTING DIODES WITH ALUMINUM-CONTAINING LAYERS INTEGRATED THEREIN AND ASSOCIATED METHODS May 3, 2021 Pending
Array ( [id] => 17010852 [patent_doc_number] => 20210242013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => PATTERNED STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/234818 [patent_app_country] => US [patent_app_date] => 2021-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17234818 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/234818
Patterned structure Apr 19, 2021 Issued
Array ( [id] => 17917855 [patent_doc_number] => 20220320251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => DISPLAY SUBSTRATE AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/599258 [patent_app_country] => US [patent_app_date] => 2021-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15127 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17599258 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/599258
Display substrate and display device Apr 14, 2021 Issued
Array ( [id] => 16981592 [patent_doc_number] => 20210225829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => METHOD OF MANUFACTURING PACKAGE-ON-PACKAGE DEVICE AND BONDING APPARATUS USED THEREIN [patent_app_type] => utility [patent_app_number] => 17/224520 [patent_app_country] => US [patent_app_date] => 2021-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4278 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17224520 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/224520
Method of manufacturing package-on-package device and bonding apparatus used therein Apr 6, 2021 Issued
Array ( [id] => 18137354 [patent_doc_number] => 11563043 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-24 [patent_title] => Chip packaging structure and chip packaging method [patent_app_type] => utility [patent_app_number] => 17/223735 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6139 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17223735 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/223735
Chip packaging structure and chip packaging method Apr 5, 2021 Issued
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