Search

Mohammad M. Choudhry

Examiner (ID: 17067, Phone: (571)270-5716 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2899, 4126, 2894, 2816, 2898
Total Applications
905
Issued Applications
706
Pending Applications
84
Abandoned Applications
138

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18439989 [patent_doc_number] => 20230187284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => IN-SITU FEEDBACK FOR LOCALIZED COMPENSATION [patent_app_type] => utility [patent_app_number] => 17/551266 [patent_app_country] => US [patent_app_date] => 2021-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9000 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17551266 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/551266
IN-SITU FEEDBACK FOR LOCALIZED COMPENSATION Dec 14, 2021 Abandoned
Array ( [id] => 19436089 [patent_doc_number] => 20240304587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => POWER MODULE, ELECTRICAL DEVICE AND METHOD FOR PRODUCING A POWER MODULE [patent_app_type] => utility [patent_app_number] => 18/277443 [patent_app_country] => US [patent_app_date] => 2021-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6600 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18277443 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/277443
POWER MODULE, ELECTRICAL DEVICE AND METHOD FOR PRODUCING A POWER MODULE Dec 9, 2021 Pending
Array ( [id] => 18688497 [patent_doc_number] => 11784243 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Oxide-nitride-oxide stack having multiple oxynitride layers [patent_app_type] => utility [patent_app_number] => 17/541029 [patent_app_country] => US [patent_app_date] => 2021-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 26 [patent_no_of_words] => 9774 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17541029 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/541029
Oxide-nitride-oxide stack having multiple oxynitride layers Dec 1, 2021 Issued
Array ( [id] => 19023100 [patent_doc_number] => 20240079271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => WAFER REWIRING DOUBLE VERIFICATION STRUCTURE, AND MANUFACTURING METHOD AND VERIFICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/273647 [patent_app_country] => US [patent_app_date] => 2021-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3911 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18273647 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/273647
WAFER REWIRING DOUBLE VERIFICATION STRUCTURE, AND MANUFACTURING METHOD AND VERIFICATION METHOD THEREOF Nov 22, 2021 Pending
Array ( [id] => 19000943 [patent_doc_number] => 11917821 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Process for a 3-dimensional array of horizontal nor-type memory strings [patent_app_type] => utility [patent_app_number] => 17/527972 [patent_app_country] => US [patent_app_date] => 2021-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5310 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17527972 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/527972
Process for a 3-dimensional array of horizontal nor-type memory strings Nov 15, 2021 Issued
Array ( [id] => 19886866 [patent_doc_number] => 12272595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => Removing polymer through treatment [patent_app_type] => utility [patent_app_number] => 17/453872 [patent_app_country] => US [patent_app_date] => 2021-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5025 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17453872 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/453872
Removing polymer through treatment Nov 7, 2021 Issued
Array ( [id] => 17431752 [patent_doc_number] => 20220059461 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/519313 [patent_app_country] => US [patent_app_date] => 2021-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8189 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17519313 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/519313
Semiconductor device structure and method for forming the same Nov 3, 2021 Issued
Array ( [id] => 20267061 [patent_doc_number] => 12438060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Chip package and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/453489 [patent_app_country] => US [patent_app_date] => 2021-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 1030 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17453489 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/453489
Chip package and method of manufacturing the same Nov 3, 2021 Issued
Array ( [id] => 17615684 [patent_doc_number] => 20220157964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/513404 [patent_app_country] => US [patent_app_date] => 2021-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7653 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17513404 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/513404
Semiconductor device Oct 27, 2021 Issued
Array ( [id] => 17615863 [patent_doc_number] => 20220158143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => APPARATUS AND METHOD OF MANUFACTURING DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 17/504354 [patent_app_country] => US [patent_app_date] => 2021-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9868 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17504354 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/504354
Apparatus and method of manufacturing display apparatus Oct 17, 2021 Issued
Array ( [id] => 19168598 [patent_doc_number] => 11984513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Charge trapping non-volatile organic memory device [patent_app_type] => utility [patent_app_number] => 17/501405 [patent_app_country] => US [patent_app_date] => 2021-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9392 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17501405 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/501405
Charge trapping non-volatile organic memory device Oct 13, 2021 Issued
Array ( [id] => 17373819 [patent_doc_number] => 20220028871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => SILICON OXIDE NITRIDE TUNNEL DIELECTRIC FOR A STORAGE TRANSISTOR IN A 3-DIMENSIONAL NOR MEMORY STRING ARRAY [patent_app_type] => utility [patent_app_number] => 17/494549 [patent_app_country] => US [patent_app_date] => 2021-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17494549 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/494549
Silicon oxide nitride tunnel dielectric for a storage transistor in a 3-dimensional NOR memory string array Oct 4, 2021 Issued
Array ( [id] => 17692647 [patent_doc_number] => 20220199940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/483466 [patent_app_country] => US [patent_app_date] => 2021-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10720 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17483466 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/483466
Display device Sep 22, 2021 Issued
Array ( [id] => 18047890 [patent_doc_number] => 11521848 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium [patent_app_type] => utility [patent_app_number] => 17/479554 [patent_app_country] => US [patent_app_date] => 2021-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 9064 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17479554 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/479554
Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium Sep 19, 2021 Issued
Array ( [id] => 17318808 [patent_doc_number] => 20210407858 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/473486 [patent_app_country] => US [patent_app_date] => 2021-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10428 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17473486 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/473486
Semiconductor device structure and method for forming the same Sep 12, 2021 Issued
Array ( [id] => 18178679 [patent_doc_number] => 20230039408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/472586 [patent_app_country] => US [patent_app_date] => 2021-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2910 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17472586 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/472586
Semiconductor memory device and fabrication method thereof Sep 10, 2021 Issued
Array ( [id] => 19681342 [patent_doc_number] => 12193231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Fabricating three-dimensional semiconductor structures [patent_app_type] => utility [patent_app_number] => 17/472213 [patent_app_country] => US [patent_app_date] => 2021-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 42 [patent_no_of_words] => 13996 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17472213 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/472213
Fabricating three-dimensional semiconductor structures Sep 9, 2021 Issued
Array ( [id] => 18874772 [patent_doc_number] => 11862595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Packaging method for fan-out wafer-level packaging structure [patent_app_type] => utility [patent_app_number] => 17/469783 [patent_app_country] => US [patent_app_date] => 2021-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 16 [patent_no_of_words] => 3999 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17469783 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/469783
Packaging method for fan-out wafer-level packaging structure Sep 7, 2021 Issued
Array ( [id] => 19138071 [patent_doc_number] => 11973046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Semiconductor structure and method for preparing the same [patent_app_type] => utility [patent_app_number] => 17/465449 [patent_app_country] => US [patent_app_date] => 2021-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3677 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17465449 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/465449
Semiconductor structure and method for preparing the same Sep 1, 2021 Issued
Array ( [id] => 19610794 [patent_doc_number] => 12159674 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells [patent_app_type] => utility [patent_app_number] => 17/409476 [patent_app_country] => US [patent_app_date] => 2021-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 7139 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17409476 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/409476
Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells Aug 22, 2021 Issued
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