Search

Mohammad M. Choudhry

Examiner (ID: 10423, Phone: (571)270-5716 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2816, 2898, 4126, 2899, 2894
Total Applications
890
Issued Applications
699
Pending Applications
82
Abandoned Applications
138

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17318808 [patent_doc_number] => 20210407858 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/473486 [patent_app_country] => US [patent_app_date] => 2021-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10428 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17473486 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/473486
Semiconductor device structure and method for forming the same Sep 12, 2021 Issued
Array ( [id] => 18178679 [patent_doc_number] => 20230039408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/472586 [patent_app_country] => US [patent_app_date] => 2021-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2910 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17472586 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/472586
Semiconductor memory device and fabrication method thereof Sep 10, 2021 Issued
Array ( [id] => 19681342 [patent_doc_number] => 12193231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Fabricating three-dimensional semiconductor structures [patent_app_type] => utility [patent_app_number] => 17/472213 [patent_app_country] => US [patent_app_date] => 2021-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 42 [patent_no_of_words] => 13996 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17472213 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/472213
Fabricating three-dimensional semiconductor structures Sep 9, 2021 Issued
Array ( [id] => 18874772 [patent_doc_number] => 11862595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Packaging method for fan-out wafer-level packaging structure [patent_app_type] => utility [patent_app_number] => 17/469783 [patent_app_country] => US [patent_app_date] => 2021-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 16 [patent_no_of_words] => 3999 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17469783 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/469783
Packaging method for fan-out wafer-level packaging structure Sep 7, 2021 Issued
Array ( [id] => 19138071 [patent_doc_number] => 11973046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Semiconductor structure and method for preparing the same [patent_app_type] => utility [patent_app_number] => 17/465449 [patent_app_country] => US [patent_app_date] => 2021-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3677 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17465449 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/465449
Semiconductor structure and method for preparing the same Sep 1, 2021 Issued
Array ( [id] => 19610794 [patent_doc_number] => 12159674 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells [patent_app_type] => utility [patent_app_number] => 17/409476 [patent_app_country] => US [patent_app_date] => 2021-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 7139 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17409476 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/409476
Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells Aug 22, 2021 Issued
Array ( [id] => 19525670 [patent_doc_number] => 12127428 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 17/445114 [patent_app_country] => US [patent_app_date] => 2021-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 12593 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17445114 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/445114
Display device Aug 15, 2021 Issued
Array ( [id] => 17886681 [patent_doc_number] => 20220302159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/394548 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17394548 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/394548
Semiconductor device and method of manufacturing the same Aug 4, 2021 Issued
Array ( [id] => 17389423 [patent_doc_number] => 20220037275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => FLOW GUIDING STRUCTURE OF CHIP [patent_app_type] => utility [patent_app_number] => 17/444229 [patent_app_country] => US [patent_app_date] => 2021-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17444229 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/444229
FLOW GUIDING STRUCTURE OF CHIP Aug 1, 2021 Pending
Array ( [id] => 17389423 [patent_doc_number] => 20220037275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => FLOW GUIDING STRUCTURE OF CHIP [patent_app_type] => utility [patent_app_number] => 17/444229 [patent_app_country] => US [patent_app_date] => 2021-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17444229 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/444229
FLOW GUIDING STRUCTURE OF CHIP Aug 1, 2021 Pending
Array ( [id] => 18609893 [patent_doc_number] => 11751391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Methods for fabricating a 3-dimensional memory structure of nor memory strings [patent_app_type] => utility [patent_app_number] => 17/382126 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 33 [patent_no_of_words] => 5280 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382126 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/382126
Methods for fabricating a 3-dimensional memory structure of nor memory strings Jul 20, 2021 Issued
Array ( [id] => 18609893 [patent_doc_number] => 11751391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Methods for fabricating a 3-dimensional memory structure of nor memory strings [patent_app_type] => utility [patent_app_number] => 17/382126 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 33 [patent_no_of_words] => 5280 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382126 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/382126
Methods for fabricating a 3-dimensional memory structure of nor memory strings Jul 20, 2021 Issued
Array ( [id] => 17477534 [patent_doc_number] => 20220085038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => MEMORY CELL OF NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 17/381468 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9097 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17381468 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/381468
Memory cell of non-volatile memory Jul 20, 2021 Issued
Array ( [id] => 18423919 [patent_doc_number] => 20230178383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => RELEASE FILM FOR SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 17/922302 [patent_app_country] => US [patent_app_date] => 2021-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9837 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17922302 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/922302
RELEASE FILM FOR SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREFOR Jul 15, 2021 Pending
Array ( [id] => 18097567 [patent_doc_number] => 20220415908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => METAL HYBRID CHARGE STORAGE STRUCTURE FOR MEMORY [patent_app_type] => utility [patent_app_number] => 17/375540 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2781 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375540 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375540
Metal hybrid charge storage structure for memory Jul 13, 2021 Issued
Array ( [id] => 19414712 [patent_doc_number] => 12080548 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Selective deposition using hydrophobic precursors [patent_app_type] => utility [patent_app_number] => 17/370263 [patent_app_country] => US [patent_app_date] => 2021-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6967 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17370263 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/370263
Selective deposition using hydrophobic precursors Jul 7, 2021 Issued
Array ( [id] => 18299066 [patent_doc_number] => 20230108752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-06 [patent_title] => DISPLAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/604931 [patent_app_country] => US [patent_app_date] => 2021-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 39187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17604931 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/604931
Display substrate, manufacturing method thereof and display device Jul 7, 2021 Issued
Array ( [id] => 17188859 [patent_doc_number] => 20210335744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => STACKABLE FULLY MOLDED SEMICONDUCTOR STRUCTURE WITH VERTICAL INTERCONNECTS [patent_app_type] => utility [patent_app_number] => 17/368743 [patent_app_country] => US [patent_app_date] => 2021-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12895 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17368743 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/368743
Stackable fully molded semiconductor structure with vertical interconnects Jul 5, 2021 Issued
Array ( [id] => 17174183 [patent_doc_number] => 20210327854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => Packages with Metal Line Crack Prevention Design [patent_app_type] => utility [patent_app_number] => 17/361791 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4416 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361791 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/361791
Packages with metal line crack prevention design Jun 28, 2021 Issued
Array ( [id] => 18081008 [patent_doc_number] => 20220406620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => FABRICATING METHOD FOR WAFER LEVEL SEMICONDUCTOR PACKAGE DEVICE AND THE FABRICATED SEMICONDUCTOR PACKAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/354214 [patent_app_country] => US [patent_app_date] => 2021-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2639 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17354214 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/354214
FABRICATING METHOD FOR WAFER LEVEL SEMICONDUCTOR PACKAGE DEVICE AND THE FABRICATED SEMICONDUCTOR PACKAGE DEVICE Jun 21, 2021 Abandoned
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