Search

Mohammad M. Hoque

Examiner (ID: 19133, Phone: (571)272-6266 , Office: P/2817 )

Most Active Art Unit
2817
Art Unit(s)
2817, 2823
Total Applications
817
Issued Applications
634
Pending Applications
116
Abandoned Applications
111

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19544614 [patent_doc_number] => 20240361650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => DISPLAY DEVICE INCLUDING A PAD WHERE A DRIVING CHIP IS MOUNTED [patent_app_type] => utility [patent_app_number] => 18/765292 [patent_app_country] => US [patent_app_date] => 2024-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10668 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18765292 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/765292
DISPLAY DEVICE INCLUDING A PAD WHERE A DRIVING CHIP IS MOUNTED Jul 6, 2024 Pending
Array ( [id] => 20134041 [patent_doc_number] => 12376372 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Fin field-effect transistor and method of forming the same [patent_app_type] => utility [patent_app_number] => 18/758926 [patent_app_country] => US [patent_app_date] => 2024-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 2206 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18758926 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/758926
Fin field-effect transistor and method of forming the same Jun 27, 2024 Issued
Array ( [id] => 19515949 [patent_doc_number] => 20240347635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE WITH NANOSTRUCTURE [patent_app_type] => utility [patent_app_number] => 18/751953 [patent_app_country] => US [patent_app_date] => 2024-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9697 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18751953 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/751953
Semiconductor device structure with nanostructure Jun 23, 2024 Issued
Array ( [id] => 19515865 [patent_doc_number] => 20240347551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => HYBRID HIGH-K DIELECTRIC MATERIAL FILM STACKS COMPRISING ZIRCONIUM OXIDE UTILIZED IN DISPLAY DEVICES [patent_app_type] => utility [patent_app_number] => 18/750424 [patent_app_country] => US [patent_app_date] => 2024-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10032 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18750424 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/750424
HYBRID HIGH-K DIELECTRIC MATERIAL FILM STACKS COMPRISING ZIRCONIUM OXIDE UTILIZED IN DISPLAY DEVICES Jun 20, 2024 Pending
Array ( [id] => 19483397 [patent_doc_number] => 20240331439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => Semiconductor Device with Biofet and Biometric Sensors [patent_app_type] => utility [patent_app_number] => 18/742009 [patent_app_country] => US [patent_app_date] => 2024-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16568 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18742009 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/742009
Semiconductor device with biofet and biometric sensors Jun 12, 2024 Issued
Array ( [id] => 19421129 [patent_doc_number] => 20240297253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/656852 [patent_app_country] => US [patent_app_date] => 2024-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18656852 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/656852
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE May 6, 2024 Pending
Array ( [id] => 19421129 [patent_doc_number] => 20240297253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/656852 [patent_app_country] => US [patent_app_date] => 2024-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18656852 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/656852
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE May 6, 2024 Pending
Array ( [id] => 19900327 [patent_doc_number] => 12278267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-15 [patent_title] => Semiconductor devices having funnel-shaped gate structures [patent_app_type] => utility [patent_app_number] => 18/638120 [patent_app_country] => US [patent_app_date] => 2024-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 9318 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18638120 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/638120
Semiconductor devices having funnel-shaped gate structures Apr 16, 2024 Issued
Array ( [id] => 19323336 [patent_doc_number] => 20240244884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => ARRAY SUBSTRATE AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 18/622981 [patent_app_country] => US [patent_app_date] => 2024-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7941 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18622981 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/622981
Array substrate and display panel Mar 30, 2024 Issued
Array ( [id] => 19335542 [patent_doc_number] => 20240249972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => FILLING OPENINGS BY COMBINING NON-FLOWABLE AND FLOWABLE PROCESSES [patent_app_type] => utility [patent_app_number] => 18/590747 [patent_app_country] => US [patent_app_date] => 2024-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22223 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18590747 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/590747
Filling openings by combining non-flowable and flowable processes Feb 27, 2024 Issued
Array ( [id] => 19221706 [patent_doc_number] => 20240186410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING TRANSISTOR INCLUDING HORIZONTAL GATE STRUCTURE AND VERTICAL CHANNEL LAYER AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/443297 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12991 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18443297 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/443297
Semiconductor device including transistor including horizontal gate structure and vertical channel layer and method for fabricating the same Feb 15, 2024 Issued
Array ( [id] => 19945385 [patent_doc_number] => 12317535 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Independent control of stacked semiconductor device [patent_app_type] => utility [patent_app_number] => 18/423738 [patent_app_country] => US [patent_app_date] => 2024-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 5391 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18423738 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/423738
Independent control of stacked semiconductor device Jan 25, 2024 Issued
Array ( [id] => 19269652 [patent_doc_number] => 20240213356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/402852 [patent_app_country] => US [patent_app_date] => 2024-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38714 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18402852 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/402852
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Jan 2, 2024 Pending
Array ( [id] => 19269652 [patent_doc_number] => 20240213356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/402852 [patent_app_country] => US [patent_app_date] => 2024-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38714 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18402852 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/402852
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Jan 2, 2024 Pending
Array ( [id] => 19118361 [patent_doc_number] => 20240130111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => GROUND-CONNECTED SUPPORTS WITH INSULARING SPACERS FOR SEMICONDUCTORMEMORY CAPACTITORS AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/395918 [patent_app_country] => US [patent_app_date] => 2023-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11932 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395918 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/395918
Ground-connected supports with insulating spacers for semiconductor memory capacitors and method of fabricating the same Dec 25, 2023 Issued
Array ( [id] => 19176166 [patent_doc_number] => 20240162140 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => ELECTRONIC PACKAGE, MANUFACTURING METHOD FOR THE SAME, AND ELECTRONIC STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/389105 [patent_app_country] => US [patent_app_date] => 2023-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5560 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18389105 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/389105
Electronic structure Nov 12, 2023 Issued
Array ( [id] => 19611027 [patent_doc_number] => 12159909 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Power semiconductor device with reduced strain [patent_app_type] => utility [patent_app_number] => 18/504344 [patent_app_country] => US [patent_app_date] => 2023-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 6058 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18504344 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/504344
Power semiconductor device with reduced strain Nov 7, 2023 Issued
Array ( [id] => 18959192 [patent_doc_number] => 20240047519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => SHALLOW TRENCH ISOLATION STRUCTURE AND SEMICONDUCTOR DEVICE WITH THE SAME [patent_app_type] => utility [patent_app_number] => 18/380616 [patent_app_country] => US [patent_app_date] => 2023-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6102 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18380616 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/380616
Semiconductor device with shallow trench isolation having multi-stacked layers and method of forming the same Oct 15, 2023 Issued
Array ( [id] => 19733930 [patent_doc_number] => 12211932 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Semiconductor device with improved breakdown voltage [patent_app_type] => utility [patent_app_number] => 18/484710 [patent_app_country] => US [patent_app_date] => 2023-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7029 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18484710 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/484710
Semiconductor device with improved breakdown voltage Oct 10, 2023 Issued
Array ( [id] => 18906123 [patent_doc_number] => 20240021608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => SEMICONDUCTOR PACKAGE WITH REDISTRIBUTION SUBSTRATE HAVING EMBEDDED PASSIVE DEVICE [patent_app_type] => utility [patent_app_number] => 18/478056 [patent_app_country] => US [patent_app_date] => 2023-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13927 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18478056 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/478056
SEMICONDUCTOR PACKAGE WITH REDISTRIBUTION SUBSTRATE HAVING EMBEDDED PASSIVE DEVICE Sep 28, 2023 Pending
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