
Mohammad M. Hoque
Examiner (ID: 652, Phone: (571)272-6266 , Office: P/2817 )
| Most Active Art Unit | 2817 |
| Art Unit(s) | 2817, 2823 |
| Total Applications | 867 |
| Issued Applications | 667 |
| Pending Applications | 103 |
| Abandoned Applications | 114 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17431968
[patent_doc_number] => 20220059677
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-24
[patent_title] => VERTICAL FIELD EFFECT TRANSISTOR WITH SELF-ALIGNED SOURCE AND DRAIN TOP JUNCTION
[patent_app_type] => utility
[patent_app_number] => 17/453122
[patent_app_country] => US
[patent_app_date] => 2021-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6699
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17453122
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/453122 | Vertical field effect transistor with self-aligned source and drain top junction | Oct 31, 2021 | Issued |
Array
(
[id] => 17403120
[patent_doc_number] => 20220045211
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-10
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/511014
[patent_app_country] => US
[patent_app_date] => 2021-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9384
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17511014
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/511014 | Manufacturing method of semiconductor device including semiconductor element of inversion type | Oct 25, 2021 | Issued |
Array
(
[id] => 17389348
[patent_doc_number] => 20220037200
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-03
[patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, METHOD FOR PACKAGING SEMICONDUCTOR CHIP, METHOD FOR MANUFACTURING SHALLOW TRENCH ISOLATION (STI)
[patent_app_type] => utility
[patent_app_number] => 17/504207
[patent_app_country] => US
[patent_app_date] => 2021-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11653
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 247
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17504207
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/504207 | Method for manufacturing semiconductor device, method for packaging semiconductor chip, method for manufacturing shallow trench isolation (STI) | Oct 17, 2021 | Issued |
Array
(
[id] => 19183920
[patent_doc_number] => 11990523
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-05-21
[patent_title] => Shield gate trench MOSFET device and method for making the same
[patent_app_type] => utility
[patent_app_number] => 17/499967
[patent_app_country] => US
[patent_app_date] => 2021-10-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8756
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 436
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17499967
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/499967 | Shield gate trench MOSFET device and method for making the same | Oct 12, 2021 | Issued |
Array
(
[id] => 19063325
[patent_doc_number] => 11942580
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-03-26
[patent_title] => Compact opto-electronic modules and fabrication methods for such modules
[patent_app_type] => utility
[patent_app_number] => 17/498105
[patent_app_country] => US
[patent_app_date] => 2021-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 30
[patent_no_of_words] => 6439
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17498105
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/498105 | Compact opto-electronic modules and fabrication methods for such modules | Oct 10, 2021 | Issued |
Array
(
[id] => 18704924
[patent_doc_number] => 11791443
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-17
[patent_title] => Light emitting diode with high melanopic spectral content
[patent_app_type] => utility
[patent_app_number] => 17/498350
[patent_app_country] => US
[patent_app_date] => 2021-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5121
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17498350
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/498350 | Light emitting diode with high melanopic spectral content | Oct 10, 2021 | Issued |
Array
(
[id] => 18464332
[patent_doc_number] => 11688626
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-06-27
[patent_title] => Nanosheet transistor with self-aligned dielectric pillar
[patent_app_type] => utility
[patent_app_number] => 17/496841
[patent_app_country] => US
[patent_app_date] => 2021-10-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 22
[patent_no_of_words] => 9425
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17496841
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/496841 | Nanosheet transistor with self-aligned dielectric pillar | Oct 7, 2021 | Issued |
Array
(
[id] => 17373936
[patent_doc_number] => 20220028988
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-01-27
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/450246
[patent_app_country] => US
[patent_app_date] => 2021-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4829
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17450246
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/450246 | Semiconductor device with isolation between conductive structures | Oct 6, 2021 | Issued |
Array
(
[id] => 18297496
[patent_doc_number] => 20230107182
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-06
[patent_title] => Bottom Air Spacer by Oxidation
[patent_app_type] => utility
[patent_app_number] => 17/494061
[patent_app_country] => US
[patent_app_date] => 2021-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8018
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17494061
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/494061 | Bottom Air Spacer by Oxidation | Oct 4, 2021 | Abandoned |
Array
(
[id] => 19213810
[patent_doc_number] => 12002884
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-04
[patent_title] => Dual gate vertical thin film transistors and methods for forming the same
[patent_app_type] => utility
[patent_app_number] => 17/488368
[patent_app_country] => US
[patent_app_date] => 2021-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 67
[patent_no_of_words] => 11719
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17488368
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/488368 | Dual gate vertical thin film transistors and methods for forming the same | Sep 28, 2021 | Issued |
Array
(
[id] => 19935161
[patent_doc_number] => 12308370
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-20
[patent_title] => Cross field effect transistors (XFETs) in integrated circuits
[patent_app_type] => utility
[patent_app_number] => 17/489221
[patent_app_country] => US
[patent_app_date] => 2021-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 0
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17489221
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/489221 | Cross field effect transistors (XFETs) in integrated circuits | Sep 28, 2021 | Issued |
Array
(
[id] => 20119633
[patent_doc_number] => 12369372
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-22
[patent_title] => Semicondictor apparatus with different emitter region densities
[patent_app_type] => utility
[patent_app_number] => 17/487001
[patent_app_country] => US
[patent_app_date] => 2021-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 2090
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17487001
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/487001 | Semicondictor apparatus with different emitter region densities | Sep 27, 2021 | Issued |
Array
(
[id] => 17347216
[patent_doc_number] => 20220013547
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-01-13
[patent_title] => HYBRID HIGH-K DIELECTRIC MATERIAL FILM STACKS COMPRISING ZIRCONIUM OXIDE UTILIZED IN DISPLAY DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/487086
[patent_app_country] => US
[patent_app_date] => 2021-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9997
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17487086
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/487086 | Hybrid high-k dielectric material film stacks comprising zirconium oxide utilized in display devices | Sep 27, 2021 | Issued |
Array
(
[id] => 17347120
[patent_doc_number] => 20220013451
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-01-13
[patent_title] => COMPACT TRANSISTOR UTILIZING SHIELD STRUCTURE ARRANGEMENT
[patent_app_type] => utility
[patent_app_number] => 17/448709
[patent_app_country] => US
[patent_app_date] => 2021-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5795
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17448709
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/448709 | Compact transistor utilizing shield structure arrangement | Sep 23, 2021 | Issued |
Array
(
[id] => 18999287
[patent_doc_number] => 11916143
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-27
[patent_title] => Vertical transport field-effect transistor with gate patterning
[patent_app_type] => utility
[patent_app_number] => 17/448777
[patent_app_country] => US
[patent_app_date] => 2021-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 33
[patent_no_of_words] => 6844
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17448777
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/448777 | Vertical transport field-effect transistor with gate patterning | Sep 23, 2021 | Issued |
Array
(
[id] => 19063289
[patent_doc_number] => 11942544
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-03-26
[patent_title] => Semiconductor device including transistor including horizontal gate structure and vertical channel layer and method for fabricating the same
[patent_app_type] => utility
[patent_app_number] => 17/481479
[patent_app_country] => US
[patent_app_date] => 2021-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 32
[patent_no_of_words] => 12968
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17481479
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/481479 | Semiconductor device including transistor including horizontal gate structure and vertical channel layer and method for fabricating the same | Sep 21, 2021 | Issued |
Array
(
[id] => 17795833
[patent_doc_number] => 20220254925
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-08-11
[patent_title] => 3D DEVICES WITH 3D DIFFUSION BREAKS AND METHOD OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/480361
[patent_app_country] => US
[patent_app_date] => 2021-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10446
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17480361
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/480361 | 3D DEVICES WITH 3D DIFFUSION BREAKS AND METHOD OF FORMING THE SAME | Sep 20, 2021 | Abandoned |
Array
(
[id] => 19169883
[patent_doc_number] => 11985808
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-05-14
[patent_title] => Memory and method for manufacturing same
[patent_app_type] => utility
[patent_app_number] => 17/479148
[patent_app_country] => US
[patent_app_date] => 2021-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 9185
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17479148
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/479148 | Memory and method for manufacturing same | Sep 19, 2021 | Issued |
Array
(
[id] => 18983754
[patent_doc_number] => 11908944
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-20
[patent_title] => Contact formation for vertical field effect transistors
[patent_app_type] => utility
[patent_app_number] => 17/447904
[patent_app_country] => US
[patent_app_date] => 2021-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 8433
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17447904
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/447904 | Contact formation for vertical field effect transistors | Sep 15, 2021 | Issued |
Array
(
[id] => 18251257
[patent_doc_number] => 20230078296
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-16
[patent_title] => SEMICONDUCTOR STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/476828
[patent_app_country] => US
[patent_app_date] => 2021-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6182
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17476828
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/476828 | Semiconductor structure | Sep 15, 2021 | Issued |