Search

Mohammad M. Hoque

Examiner (ID: 20, Phone: (571)272-6266 , Office: P/2817 )

Most Active Art Unit
2817
Art Unit(s)
2823, 2817
Total Applications
847
Issued Applications
653
Pending Applications
102
Abandoned Applications
113

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16301122 [patent_doc_number] => 20200286845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-10 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/879556 [patent_app_country] => US [patent_app_date] => 2020-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8378 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16879556 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/879556
Optical semiconductor package and method for manufacturing the same May 19, 2020 Issued
Array ( [id] => 16553114 [patent_doc_number] => 10886279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Device structure for forming semiconductor device having angled contacts [patent_app_type] => utility [patent_app_number] => 16/875431 [patent_app_country] => US [patent_app_date] => 2020-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 4927 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16875431 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/875431
Device structure for forming semiconductor device having angled contacts May 14, 2020 Issued
Array ( [id] => 17500648 [patent_doc_number] => 11289358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Wafer thinning systems and related methods [patent_app_type] => utility [patent_app_number] => 16/872971 [patent_app_country] => US [patent_app_date] => 2020-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3790 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16872971 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/872971
Wafer thinning systems and related methods May 11, 2020 Issued
Array ( [id] => 17189150 [patent_doc_number] => 20210336035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => Vertical Transport FET with Bottom Source and Drain Extensions [patent_app_type] => utility [patent_app_number] => 16/858598 [patent_app_country] => US [patent_app_date] => 2020-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7229 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16858598 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/858598
Vertical transport FET with bottom source and drain extensions Apr 24, 2020 Issued
Array ( [id] => 16812228 [patent_doc_number] => 20210134783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/858293 [patent_app_country] => US [patent_app_date] => 2020-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5330 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16858293 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/858293
Semiconductor structure having different heights of active regions Apr 23, 2020 Issued
Array ( [id] => 16746663 [patent_doc_number] => 10971668 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Light-emitting device package including a lead frame [patent_app_type] => utility [patent_app_number] => 16/853991 [patent_app_country] => US [patent_app_date] => 2020-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9211 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16853991 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/853991
Light-emitting device package including a lead frame Apr 20, 2020 Issued
Array ( [id] => 16210406 [patent_doc_number] => 20200243396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => Gate Structure and Method [patent_app_type] => utility [patent_app_number] => 16/853474 [patent_app_country] => US [patent_app_date] => 2020-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6926 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16853474 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/853474
Gate structure and method with dielectric gates and gate-cut features Apr 19, 2020 Issued
Array ( [id] => 17159124 [patent_doc_number] => 20210320175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => TRANSISTOR CIRCUIT WITH ASYMMETRICAL DRAIN AND SOURCE [patent_app_type] => utility [patent_app_number] => 16/844699 [patent_app_country] => US [patent_app_date] => 2020-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5500 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16844699 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/844699
TRANSISTOR CIRCUIT WITH ASYMMETRICAL DRAIN AND SOURCE Apr 8, 2020 Abandoned
Array ( [id] => 17818733 [patent_doc_number] => 11424358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Semiconductor device with sensor for crack detection [patent_app_type] => utility [patent_app_number] => 16/838189 [patent_app_country] => US [patent_app_date] => 2020-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 8170 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16838189 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/838189
Semiconductor device with sensor for crack detection Apr 1, 2020 Issued
Array ( [id] => 17926054 [patent_doc_number] => 11469318 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-11 [patent_title] => Superjunction semiconductor device having parallel PN structure with column structure and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/836212 [patent_app_country] => US [patent_app_date] => 2020-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 29 [patent_no_of_words] => 12561 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 436 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16836212 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/836212
Superjunction semiconductor device having parallel PN structure with column structure and method of manufacturing the same Mar 30, 2020 Issued
Array ( [id] => 17500865 [patent_doc_number] => 11289575 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Semiconductor transistor having epitaxial channel layer [patent_app_type] => utility [patent_app_number] => 16/831817 [patent_app_country] => US [patent_app_date] => 2020-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2957 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16831817 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/831817
Semiconductor transistor having epitaxial channel layer Mar 26, 2020 Issued
Array ( [id] => 18105617 [patent_doc_number] => 11545517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Chip package structure, electronic device and method for preparing a chip package structure [patent_app_type] => utility [patent_app_number] => 16/830266 [patent_app_country] => US [patent_app_date] => 2020-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 13163 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 400 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16830266 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/830266
Chip package structure, electronic device and method for preparing a chip package structure Mar 25, 2020 Issued
Array ( [id] => 17439110 [patent_doc_number] => 11264451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-01 [patent_title] => Semiconductor device exhibiting soft recovery characteristics [patent_app_type] => utility [patent_app_number] => 16/823938 [patent_app_country] => US [patent_app_date] => 2020-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8452 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 337 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16823938 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/823938
Semiconductor device exhibiting soft recovery characteristics Mar 18, 2020 Issued
Array ( [id] => 18097776 [patent_doc_number] => 20220416117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => LED Display Convenient to Be Repaired, and Repair Method Thereof [patent_app_type] => utility [patent_app_number] => 17/424879 [patent_app_country] => US [patent_app_date] => 2020-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4761 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17424879 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/424879
LED Display Convenient to Be Repaired, and Repair Method Thereof Mar 17, 2020 Abandoned
Array ( [id] => 17239528 [patent_doc_number] => 11183419 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-23 [patent_title] => Unconfined buried interconnects [patent_app_type] => utility [patent_app_number] => 16/821074 [patent_app_country] => US [patent_app_date] => 2020-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8717 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16821074 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/821074
Unconfined buried interconnects Mar 16, 2020 Issued
Array ( [id] => 17284195 [patent_doc_number] => 11201239 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Semiconductor device including saturation current suppression layer [patent_app_type] => utility [patent_app_number] => 16/819771 [patent_app_country] => US [patent_app_date] => 2020-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 9384 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 490 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16819771 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/819771
Semiconductor device including saturation current suppression layer Mar 15, 2020 Issued
Array ( [id] => 17410401 [patent_doc_number] => 11251301 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-15 [patent_title] => Cross-bar vertical transport field effect transistors without corner rounding [patent_app_type] => utility [patent_app_number] => 16/817724 [patent_app_country] => US [patent_app_date] => 2020-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 44 [patent_no_of_words] => 7775 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16817724 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/817724
Cross-bar vertical transport field effect transistors without corner rounding Mar 12, 2020 Issued
Array ( [id] => 16119677 [patent_doc_number] => 20200211861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => DIE BONDING PROCESS FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURED THEREBY [patent_app_type] => utility [patent_app_number] => 16/816108 [patent_app_country] => US [patent_app_date] => 2020-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16816108 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/816108
DIE BONDING PROCESS FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURED THEREBY Mar 10, 2020 Abandoned
Array ( [id] => 17100373 [patent_doc_number] => 20210288164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => BOTTOM SOURCE/DRAIN ETCH WITH FIN-CUT-LAST-VTFET [patent_app_type] => utility [patent_app_number] => 16/813787 [patent_app_country] => US [patent_app_date] => 2020-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9306 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16813787 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/813787
Bottom source/drain etch with fin-cut-last-VTFET Mar 9, 2020 Issued
Array ( [id] => 16715913 [patent_doc_number] => 20210083060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/813277 [patent_app_country] => US [patent_app_date] => 2020-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5519 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16813277 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/813277
Semiconductor device having thermally conductive electrodes Mar 8, 2020 Issued
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