Search

Mohammad M. Hoque

Examiner (ID: 652, Phone: (571)272-6266 , Office: P/2817 )

Most Active Art Unit
2817
Art Unit(s)
2817, 2823
Total Applications
867
Issued Applications
667
Pending Applications
103
Abandoned Applications
114

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16264768 [patent_doc_number] => 10756216 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Nanosheet mosfet with isolated source/drain epitaxy and close junction proximity [patent_app_type] => utility [patent_app_number] => 16/059101 [patent_app_country] => US [patent_app_date] => 2018-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 7211 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16059101 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/059101
Nanosheet mosfet with isolated source/drain epitaxy and close junction proximity Aug 8, 2018 Issued
Array ( [id] => 14221359 [patent_doc_number] => 20190123064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-25 [patent_title] => TRANSISTOR DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 16/059088 [patent_app_country] => US [patent_app_date] => 2018-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6544 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16059088 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/059088
Transistor display panel including transistor having auxiliary layer overlapping edge of gate electrode Aug 8, 2018 Issued
Array ( [id] => 15503467 [patent_doc_number] => 20200051922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/059046 [patent_app_country] => US [patent_app_date] => 2018-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5799 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16059046 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/059046
Memory device including alignment mark trench Aug 8, 2018 Issued
Array ( [id] => 16218606 [patent_doc_number] => 10734429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Pad structure for backside illuminated (BSI) image sensors [patent_app_type] => utility [patent_app_number] => 16/055330 [patent_app_country] => US [patent_app_date] => 2018-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 8735 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16055330 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/055330
Pad structure for backside illuminated (BSI) image sensors Aug 5, 2018 Issued
Array ( [id] => 13571263 [patent_doc_number] => 20180337179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-22 [patent_title] => Fin Structure and Method of Forming Same Through Two-Step Etching Processes [patent_app_type] => utility [patent_app_number] => 16/050668 [patent_app_country] => US [patent_app_date] => 2018-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5862 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16050668 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/050668
Fin structure and method of forming same through two-step etching processes Jul 30, 2018 Issued
Array ( [id] => 14333149 [patent_doc_number] => 10297603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Static random access memory and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 16/032838 [patent_app_country] => US [patent_app_date] => 2018-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 10538 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16032838 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/032838
Static random access memory and fabrication method thereof Jul 10, 2018 Issued
Array ( [id] => 18277111 [patent_doc_number] => 11616060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Techniques for forming gate structures for transistors arranged in a stacked configuration on a single fin structure [patent_app_type] => utility [patent_app_number] => 16/024080 [patent_app_country] => US [patent_app_date] => 2018-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 27 [patent_no_of_words] => 11905 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16024080 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/024080
Techniques for forming gate structures for transistors arranged in a stacked configuration on a single fin structure Jun 28, 2018 Issued
Array ( [id] => 13976767 [patent_doc_number] => 10217751 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-26 [patent_title] => Static random access memory device with halo regions having different impurity concentrations [patent_app_type] => utility [patent_app_number] => 16/014920 [patent_app_country] => US [patent_app_date] => 2018-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 124 [patent_figures_cnt] => 150 [patent_no_of_words] => 55085 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 627 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16014920 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/014920
Static random access memory device with halo regions having different impurity concentrations Jun 20, 2018 Issued
Array ( [id] => 16521577 [patent_doc_number] => 10872802 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-22 [patent_title] => Method of debonding a carrier substrate from a device substrate, apparatus for performing the same, and method of singulating semiconductor chips including the same [patent_app_type] => utility [patent_app_number] => 16/011759 [patent_app_country] => US [patent_app_date] => 2018-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 5337 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16011759 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/011759
Method of debonding a carrier substrate from a device substrate, apparatus for performing the same, and method of singulating semiconductor chips including the same Jun 18, 2018 Issued
Array ( [id] => 13565671 [patent_doc_number] => 20180334383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-22 [patent_title] => NANO-ELECTROMECHANICAL SYSTEM (NEMS) DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/009668 [patent_app_country] => US [patent_app_date] => 2018-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7520 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16009668 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/009668
Nano-electromechanical system (NEMS) device structure and method for forming the same Jun 14, 2018 Issued
Array ( [id] => 14382697 [patent_doc_number] => 20190165261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => MAGNETIC MEMORY DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/009556 [patent_app_country] => US [patent_app_date] => 2018-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16009556 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/009556
MAGNETIC MEMORY DEVICE AND METHOD OF FABRICATING THE SAME Jun 14, 2018 Abandoned
Array ( [id] => 16502445 [patent_doc_number] => 10867839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Patterning methods for semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/010352 [patent_app_country] => US [patent_app_date] => 2018-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 9789 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16010352 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/010352
Patterning methods for semiconductor devices Jun 14, 2018 Issued
Array ( [id] => 15760265 [patent_doc_number] => 10622260 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Vertical transistor with reduced parasitic capacitance [patent_app_type] => utility [patent_app_number] => 16/006238 [patent_app_country] => US [patent_app_date] => 2018-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10161 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16006238 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/006238
Vertical transistor with reduced parasitic capacitance Jun 11, 2018 Issued
Array ( [id] => 15260363 [patent_doc_number] => 20190378915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => FORMING NANOSHEET TRANSISTOR WITH INNER SPACERS AT HIGHLY SCALED GATE PITCH [patent_app_type] => utility [patent_app_number] => 16/006142 [patent_app_country] => US [patent_app_date] => 2018-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9883 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16006142 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/006142
FORMING NANOSHEET TRANSISTOR WITH INNER SPACERS AT HIGHLY SCALED GATE PITCH Jun 11, 2018 Abandoned
Array ( [id] => 16432878 [patent_doc_number] => 10832975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-10 [patent_title] => Reduced static random access memory (SRAM) device foot print through controlled bottom source/drain placement [patent_app_type] => utility [patent_app_number] => 16/006187 [patent_app_country] => US [patent_app_date] => 2018-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 8398 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16006187 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/006187
Reduced static random access memory (SRAM) device foot print through controlled bottom source/drain placement Jun 11, 2018 Issued
Array ( [id] => 13452145 [patent_doc_number] => 20180277615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-27 [patent_title] => SEMICONDUCTOR DEVICE, DISPLAY DEVICE, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 15/996704 [patent_app_country] => US [patent_app_date] => 2018-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32492 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15996704 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/996704
SEMICONDUCTOR DEVICE, DISPLAY DEVICE, AND ELECTRONIC DEVICE Jun 3, 2018 Abandoned
Array ( [id] => 16820140 [patent_doc_number] => 11004980 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Thin film transistor having vertical channel and manufacturing method therefor, array substrate, display panel and display device [patent_app_type] => utility [patent_app_number] => 16/327208 [patent_app_country] => US [patent_app_date] => 2018-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 6064 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 455 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16327208 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/327208
Thin film transistor having vertical channel and manufacturing method therefor, array substrate, display panel and display device May 28, 2018 Issued
Array ( [id] => 13447851 [patent_doc_number] => 20180275468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-27 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 15/989273 [patent_app_country] => US [patent_app_date] => 2018-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10885 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 428 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15989273 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/989273
DISPLAY DEVICE May 24, 2018 Abandoned
Array ( [id] => 16850852 [patent_doc_number] => 20210151597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/056867 [patent_app_country] => US [patent_app_date] => 2018-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3202 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17056867 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/056867
SEMICONDUCTOR DEVICE May 21, 2018 Abandoned
Array ( [id] => 14510309 [patent_doc_number] => 20190198809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => THIN-FILM ENCAPSULATION STRUCTURE AND METHOD FOR OLED [patent_app_type] => utility [patent_app_number] => 15/979862 [patent_app_country] => US [patent_app_date] => 2018-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3186 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15979862 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/979862
THIN-FILM ENCAPSULATION STRUCTURE AND METHOD FOR OLED May 14, 2018 Abandoned
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