Search

Mohammad M. Hoque

Examiner (ID: 652, Phone: (571)272-6266 , Office: P/2817 )

Most Active Art Unit
2817
Art Unit(s)
2817, 2823
Total Applications
867
Issued Applications
667
Pending Applications
103
Abandoned Applications
114

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10125252 [patent_doc_number] => 09159618 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-13 [patent_title] => 'Semiconductor device with contacts and metal interconnects and method of manufacturing the semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/652944 [patent_app_country] => US [patent_app_date] => 2012-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9716 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13652944 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/652944
Semiconductor device with contacts and metal interconnects and method of manufacturing the semiconductor device Oct 15, 2012 Issued
Array ( [id] => 8764967 [patent_doc_number] => 20130093004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-18 [patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING DUMMY PILLAR NEAR INTERMEDIATE PORTION OF SEMICONDUCTOR PILLAR GROUP' [patent_app_type] => utility [patent_app_number] => 13/651786 [patent_app_country] => US [patent_app_date] => 2012-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13972 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13651786 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/651786
SEMICONDUCTOR DEVICE INCLUDING DUMMY PILLAR NEAR INTERMEDIATE PORTION OF SEMICONDUCTOR PILLAR GROUP Oct 14, 2012 Abandoned
Array ( [id] => 10022373 [patent_doc_number] => 09064868 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-23 [patent_title] => 'Advanced faraday shield for a semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/650233 [patent_app_country] => US [patent_app_date] => 2012-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5264 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13650233 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/650233
Advanced faraday shield for a semiconductor device Oct 11, 2012 Issued
Array ( [id] => 10876182 [patent_doc_number] => 08900967 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-02 [patent_title] => 'Method for fabricating semiconductor device having buried gate' [patent_app_type] => utility [patent_app_number] => 13/651161 [patent_app_country] => US [patent_app_date] => 2012-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4065 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13651161 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/651161
Method for fabricating semiconductor device having buried gate Oct 11, 2012 Issued
Array ( [id] => 8821605 [patent_doc_number] => 20130122650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-16 [patent_title] => 'Method For Preparing P-Type Zinc Oxide ZnO or P-Type ZnMgO' [patent_app_type] => utility [patent_app_number] => 13/646999 [patent_app_country] => US [patent_app_date] => 2012-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8416 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13646999 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/646999
Method For Preparing P-Type Zinc Oxide ZnO or P-Type ZnMgO Oct 7, 2012 Abandoned
Array ( [id] => 11453297 [patent_doc_number] => 09576949 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-21 [patent_title] => 'Diode formed of PMOSFET and schottky diodes' [patent_app_type] => utility [patent_app_number] => 13/604299 [patent_app_country] => US [patent_app_date] => 2012-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2990 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13604299 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/604299
Diode formed of PMOSFET and schottky diodes Sep 4, 2012 Issued
Array ( [id] => 9016018 [patent_doc_number] => 20130230982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/598688 [patent_app_country] => US [patent_app_date] => 2012-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4047 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13598688 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/598688
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Aug 29, 2012 Abandoned
Array ( [id] => 9542338 [patent_doc_number] => 20140166985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'RECTIFYING DEVICE, TRANSISTOR, AND RECTIFYING METHOD' [patent_app_type] => utility [patent_app_number] => 14/240219 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5848 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14240219 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/240219
Rectifying device, transistor, and rectifying method Aug 20, 2012 Issued
Array ( [id] => 8513781 [patent_doc_number] => 20120313188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-13 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/589762 [patent_app_country] => US [patent_app_date] => 2012-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 16959 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13589762 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/589762
Semiconductor device including a field effect transistor Aug 19, 2012 Issued
Array ( [id] => 9594665 [patent_doc_number] => 20140191342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'MEMS SENSOR' [patent_app_type] => utility [patent_app_number] => 14/239877 [patent_app_country] => US [patent_app_date] => 2012-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2755 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14239877 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/239877
MEMS SENSOR Aug 9, 2012 Abandoned
Array ( [id] => 9662133 [patent_doc_number] => 08809109 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-19 [patent_title] => 'Method and structure for eliminating edge peeling in thin-film photovoltaic absorber materials' [patent_app_type] => utility [patent_app_number] => 13/476594 [patent_app_country] => US [patent_app_date] => 2012-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 6218 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13476594 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/476594
Method and structure for eliminating edge peeling in thin-film photovoltaic absorber materials May 20, 2012 Issued
Array ( [id] => 8450796 [patent_doc_number] => 20120261742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-18 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/457054 [patent_app_country] => US [patent_app_date] => 2012-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6803 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13457054 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/457054
Nonvolatile semiconductor memory apparatus Apr 25, 2012 Issued
Array ( [id] => 9817580 [patent_doc_number] => 08927364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-06 [patent_title] => 'Structure and method of high-performance extremely thin silicon on insulator complementary metal—oxide—semiconductor transistors with dual stress buried insulators' [patent_app_type] => utility [patent_app_number] => 13/443133 [patent_app_country] => US [patent_app_date] => 2012-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 43 [patent_no_of_words] => 5349 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 428 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13443133 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/443133
Structure and method of high-performance extremely thin silicon on insulator complementary metal—oxide—semiconductor transistors with dual stress buried insulators Apr 9, 2012 Issued
Array ( [id] => 9762974 [patent_doc_number] => 08847302 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-30 [patent_title] => 'Vertical NAND device with low capacitance and silicided word lines' [patent_app_type] => utility [patent_app_number] => 13/443287 [patent_app_country] => US [patent_app_date] => 2012-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 3675 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13443287 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/443287
Vertical NAND device with low capacitance and silicided word lines Apr 9, 2012 Issued
Array ( [id] => 8462533 [patent_doc_number] => 20120267702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-25 [patent_title] => 'VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/442482 [patent_app_country] => US [patent_app_date] => 2012-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 11967 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13442482 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/442482
VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME Apr 8, 2012 Abandoned
Array ( [id] => 9079103 [patent_doc_number] => 20130264633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-10 [patent_title] => 'LOGIC TRANSISTOR AND NON-VOLATILE MEMORY CELL INTEGRATION' [patent_app_type] => utility [patent_app_number] => 13/442142 [patent_app_country] => US [patent_app_date] => 2012-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5253 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13442142 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/442142
Logic transistor and non-volatile memory cell integration Apr 8, 2012 Issued
Array ( [id] => 9446391 [patent_doc_number] => 20140117559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'PROCESS AND MATERIAL FOR PREVENTING DELETERIOUS EXPANSION OF HIGH ASPECT RATIO COPPER FILLED THROUGH SILICON VIAS (TSVS)' [patent_app_type] => utility [patent_app_number] => 13/997577 [patent_app_country] => US [patent_app_date] => 2012-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8372 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13997577 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/997577
PROCESS AND MATERIAL FOR PREVENTING DELETERIOUS EXPANSION OF HIGH ASPECT RATIO COPPER FILLED THROUGH SILICON VIAS (TSVS) Mar 29, 2012 Abandoned
Array ( [id] => 9389242 [patent_doc_number] => 08685840 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-01 [patent_title] => 'In-situ gettering method for removing metal impurities from the surface and interior of a upgraded metallurgical grade silicon wafer' [patent_app_type] => utility [patent_app_number] => 13/313124 [patent_app_country] => US [patent_app_date] => 2011-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1577 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13313124 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/313124
In-situ gettering method for removing metal impurities from the surface and interior of a upgraded metallurgical grade silicon wafer Dec 6, 2011 Issued
Array ( [id] => 10022324 [patent_doc_number] => 09064819 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-23 [patent_title] => 'Post-etch treating method' [patent_app_type] => utility [patent_app_number] => 13/313266 [patent_app_country] => US [patent_app_date] => 2011-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4277 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13313266 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/313266
Post-etch treating method Dec 6, 2011 Issued
Array ( [id] => 8744945 [patent_doc_number] => 20130084663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'METHOD FOR FABRICATING PHOTO SPACER AND LIQUID CRYSTAL DISPLAY AND ARRAY SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/312994 [patent_app_country] => US [patent_app_date] => 2011-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4497 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13312994 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/312994
METHOD FOR FABRICATING PHOTO SPACER AND LIQUID CRYSTAL DISPLAY AND ARRAY SUBSTRATE Dec 6, 2011 Abandoned
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